Specifications
| Type | Description |
|---|---|
| Part Number | CDCE913 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | PW TSSOP-14, 5 mm × 6.4 mm |
| PLL Count | 1 PLL |
| Output Count | 3 outputs |
| Maximum Output Frequency | 230 MHz |
| External Crystal Frequency Range | 8 MHz to 32 MHz |
| LVCMOS Input Clock Frequency | Up to 160 MHz |
| VCXO Pull Range | ±150 ppm |
| Typical Period Jitter | 50 ps |
| Device Supply Voltage | 1.8 V |
| CDCE913 Output Supply Voltage | 2.5 V to 3.3 V |
| CDCEL913 Output Supply Voltage | 1.8 V |
| Operating Free-Air Temperature | -40°C to 85°C |
| Pin Count | 14 pins |
| Control Inputs | S0, S1, S2 |
| Serial Interface Pins | SDA/SCL |
| Absolute Maximum Device Supply Voltage | -0.5 V to 2.5 V |
| Absolute Maximum CDCE913 Output Supply Voltage | -0.5 V to 4.1 V |
| Absolute Maximum Input Voltage | -0.5 V to VDD + 0.5 V |
| Absolute Maximum Output Voltage | -0.5 V to VDDOUT + 0.5 V |
| Absolute Maximum Input Current | 20 mA |
| Absolute Maximum Continuous Output Current | 50 mA |
| Maximum Junction Temperature | 125°C |
| Storage Temperature | -65°C to 150°C |
| ESD HBM Rating | ±2000 V |
| ESD CDM Rating | ±1500 V |
| Recommended Device Supply Voltage | 1.7 V min, 1.8 V nom, 1.9 V max |
| Recommended CDCE913 Output Supply Voltage | 2.3 V to 3.6 V |
| Recommended CDCEL913 Output Supply Voltage | 1.7 V to 1.9 V |
| LVCMOS Low-Level Input Voltage | 0.3 × VDD max |
| LVCMOS High-Level Input Voltage | 0.7 × VDD min |
| LVCMOS Input Threshold Voltage | 0.5 × VDD |
| S0 Input Voltage Range | 0 V to 1.9 V |
| S1/S2/SDA/SCL Input Voltage Range | 0 V to 3.6 V |
| CLK Input Voltage Range | 0 V to 1.9 V |
| Output Current at 3.3 V | ±12 mA |
| Output Current at 2.5 V | ±10 mA |
| Output Current at 1.8 V | ±8 mA |
| LVCMOS Output Load | 15 pF |
| Recommended Crystal Input Frequency | 8 MHz min, 27 MHz nom, 32 MHz max |
| Crystal Effective Series Resistance | 100 Ω max |
| VCXO Pulling Range | ±120 ppm min, ±150 ppm typ |
| Frequency Control Voltage | 0 V to VDD |
| Pullability Ratio | 220 |
| On-Chip Load Capacitance | 0 pF to 20 pF |
| Junction-to-Ambient Thermal Resistance | 106°C/W |
| Junction-to-Case Top Thermal Resistance | 1.4°C/W |
| Junction-to-Board Thermal Resistance | 66°C/W |
| Supply Current | 11 mA typ |
| Per-PLL Supply Current | 9 mA typ |
| Output Supply Current at 3.3 V | 1.3 mA typ |
| Output Supply Current at 1.8 V | 0.7 mA typ |
| Power-Down Current | 30 µA max |
| Power-Up Control Threshold | 0.85 V min, 1.45 V max |
| PLL VCO Frequency Range | 80 MHz to 230 MHz |
| LVCMOS Output Frequency at 3.3 V | 230 MHz max |
| LVCMOS Output Frequency at 1.8 V | 230 MHz max |
| LVCMOS Input Clamp Voltage | -1.2 V |
| LVCMOS Input Current | ±5 µA |
| S0/S1/S2 High Input Current | 5 µA |
| S0/S1/S2 Low Input Current | -4 µA |
| Xin/CLK Input Capacitance | 6 pF typ |
| Xout Input Capacitance | 2 pF typ |
| S0/S1/S2 Input Capacitance | 3 pF typ |
| CDCE913 3.3-V High-Level Output Voltage | 2.9 V min |
| CDCE913 3.3-V Low-Level Output Voltage | 0.8 V max |
| CDCE913 3.3-V Propagation Delay | 3.2 ns typ |
| CDCE913 3.3-V Rise/Fall Time | 0.6 ns typ |
| CDCE913 3.3-V Cycle-to-Cycle Jitter | 50 ps typ, 70 ps max |
| CDCE913 3.3-V Peak-to-Peak Period Jitter | 60 ps typ, 100 ps max |
| CDCE913 3.3-V Output Skew | 60 ps typ |
| CDCE913 3.3-V Output Duty Cycle | 45% min, 55% max |
| CDCE913 2.5-V High-Level Output Voltage | 2.2 V min |
| CDCE913 2.5-V Low-Level Output Voltage | 0.7 V max |
| CDCE913 2.5-V Propagation Delay | 3.6 ns typ |
| CDCE913 2.5-V Rise/Fall Time | 0.8 ns typ |
| CDCE913 2.5-V Cycle-to-Cycle Jitter | 50 ps typ, 70 ps max |
| CDCE913 2.5-V Peak-to-Peak Period Jitter | 60 ps typ, 100 ps max |
| CDCE913 2.5-V Output Duty Cycle | 45% min, 55% max |
| CDCEL913 1.8-V High-Level Output Voltage | 1.6 V min |
| Datasheet Status | request_only |
Product Overview
The CDCE913 is a Texas Instruments programmable LVCMOS clock generator for Signal_Chain timing applications. This family member uses 1 integrated configurable PLL and supports 3 outputs, with each output programmable up to 230 MHz. Clock input options include an external crystal from 8 MHz to 32 MHz or a single-ended LVCMOS input clock up to 160 MHz.
The device operates from a 1.8 V device supply, with CDCE913 output supply pins supporting 2.5 V to 3.3 V operation. Recommended VDD is 1.7 V minimum, 1.8 V nominal, and 1.9 V maximum. The CDCE913 output supply recommendation is 2.3 V to 3.6 V, and LVCMOS output loading is specified at 15 pF.
The package is PW TSSOP-14, 5 mm × 6.4 mm, with 14 pins. Control inputs S0, S1, and S2 are user-programmable LVCMOS inputs with 500-kΩ internal pullup, and SDA/SCL provide a 2-wire serial interface. The operating free-air temperature range is -40°C to 85°C, with absolute maximum storage temperature from -65°C to 150°C.
Key Features
- 1 integrated configurable PLL for clock generation
- 3 programmable LVCMOS outputs support up to 230 MHz
- External crystal input range from 8 MHz to 32 MHz
- Single-ended LVCMOS clock input supports up to 160 MHz
- On-chip VCXO supports ±150 ppm typical pull range
- Typical period jitter is specified at 50 ps
- Device supply operates at 1.8 V nominal
- CDCE913 output supply supports 2.5 V to 3.3 V
- SDA/SCL pins provide 2-wire serial interface configuration
- PW TSSOP-14 package provides 14-pin assembly format
Typical Applications
- Programmable LVCMOS clock generation
- Multi-output timing distribution
- Crystal-referenced clock synthesis
- Single-ended LVCMOS clock input designs
- VCXO-based frequency control
- 2-wire serial clock configuration
- 3.3 V and 2.5 V output timing
- Wide-temperature clock generator assemblies
Procurement Notes
When requesting a quote for CDCE913, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
How many PLLs and outputs does the CDCE913 provide?
The CDCE913 family member provides 1 PLL and 3 programmable outputs. Each output is programmable using the integrated configurable PLL, with maximum output frequency specified up to 230 MHz.
What input clock options are specified for the CDCE913?
The device supports an external crystal input frequency range from 8 MHz to 32 MHz. It also supports a single-ended LVCMOS input clock with frequency up to 160 MHz.
What supply voltages apply to the CDCE913 outputs?
The device supply voltage is 1.8 V. For the CDCE913, separate VDDOUT output supply pins support 2.5 V to 3.3 V, with a recommended CDCE913 output supply range of 2.3 V to 3.6 V.
What package and temperature range are specified?
The CDCE913 is specified in the PW TSSOP-14 package, measuring 5 mm × 6.4 mm, with 14 pins. The operating free-air temperature range is -40°C to 85°C.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 7, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.