Specifications
| Type | Description |
|---|---|
| Part Number | DRV2625 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Component Type | Power_IC |
| Package / Case | DSBGA (YFF), 9 pins, 1.498 mm x 1.361 mm nominal |
| Supply Voltage | 2.7 to 5.5 V; recommended operating conditions |
| Load Impedance | 8 ohm; recommended operating conditions |
| Load Capacitance | 100 pF; recommended operating conditions |
| LRA Frequency | 45 to 300 Hz; recommended operating conditions |
| Supply Voltage Absolute Maximum | -0.3 to 6 V; over operating free-air temperature range |
| NRST Input Voltage Absolute Maximum | -0.3 to 6 V; over operating free-air temperature range |
| SDA Input Voltage Absolute Maximum | -0.3 to 6 V; over operating free-air temperature range |
| SCL Input Voltage Absolute Maximum | -0.3 to 6 V; over operating free-air temperature range |
| TRIG/INTZ Input Voltage Absolute Maximum | -0.3 to 6 V; over operating free-air temperature range |
| Operating Free-Air Temperature | -40 to 85 °C; absolute maximum ratings |
| Operating Junction Temperature | -40 to 150 °C; absolute maximum ratings |
| Storage Temperature | -65 to 150 °C; absolute maximum ratings |
| HBM ESD Rating | -1500 to 1500 V; ANSI/ESDA/JEDEC JS-001, all pins |
| CDM ESD Rating | -500 to 500 V; JEDEC JESD22-C101, all pins |
| Junction-to-Ambient Thermal Resistance | 107 °C/W; DSBGA 9-pin package |
| Junction-to-Case Top Thermal Resistance | 0.9 °C/W; DSBGA 9-pin package |
| Junction-to-Board Thermal Resistance | 18.1 °C/W; DSBGA 9-pin package |
| Junction-to-Top Characterization Parameter | 3.8 °C/W; DSBGA 9-pin package |
| Junction-to-Board Characterization Parameter | 18.1 °C/W; DSBGA 9-pin package |
| REG Pin Voltage | 1.84 V typ; TA=25°C, VDD=3.6V |
| Digital Low-Level Input Current | 100 nA typ; NRST, TRIG/INTZ, SDA, SCL; VDD=5.5V, VI=0V |
| Digital High-Level Input Current | 0.1 µA typ; SDA, SCL; VDD=5.5V, VI=VDD |
| Digital High-Level Input Current | 1 µA typ; NRST; VDD=5.5V, VI=VDD |
| Digital High-Level Input Current | 2.7 to 3.5 µA; TRIG/INTZ; VDD=5.5V, VI=VDD |
| Digital Low-Level Input Voltage | 0.4 V max; NRST, TRIG/INTZ, SDA, SCL |
| Digital High-Level Input Voltage | 1.41 V min; NRST, TRIG/INTZ, SDA, SCL |
| Digital Low-Level Output Voltage | 0.4 V max; TRIG/INTZ, SDA; 3-mA sink current |
| Drain-Source On-State Resistance | 0.75 ohm typ; low-side plus high-side |
| Shutdown Current | 105 µA typ, 180 µA max; VNRST=0V |
| Standby Current | 1.55 µA typ, 2 µA max; VNRST=VDD, in standby mode |
| Quiescent Current | 2.5 mA typ; VNRST=VDD, idle mode, no signal |
| Output Impedance in Shutdown | 15 kohm typ; OUT+ to GND, OUT- to GND |
| Output Impedance in Standby | 15 kohm typ; OUT+ to GND, OUT- to GND |
| Load Impedance Threshold for Over-Current Detection | 4 ohm typ; OUT+ to GND, OUT- to GND |
| SCL Frequency | 400 kHz max; no wait states; TA=25°C, VDD=3.6V |
| SCL High Pulse Duration | 0.6 µs min; TA=25°C, VDD=3.6V |
| SCL Low Pulse Duration | 1.3 µs min; TA=25°C, VDD=3.6V |
| SDA to SCL Setup Time | 100 ns min; TA=25°C, VDD=3.6V |
| SCL to SDA Hold Time | 10 ns min; TA=25°C, VDD=3.6V |
| Bus Free Time Between Stop and Start | 1.3 µs min; TA=25°C, VDD=3.6V |
| SCL to Start Setup Time | 0.6 µs min; TA=25°C, VDD=3.6V |
| Start Condition to SCL Hold Time | 0.6 µs min; TA=25°C, VDD=3.6V |
| SCL to Stop Setup Time | 0.6 µs min; TA=25°C, VDD=3.6V |
| Device Startup Time | 1 ms max; from shutdown to standby; TA=25°C, VDD=3.6V |
| Waveform Startup Time | 1 ms max; from trigger to output signal; TA=25°C, VDD=3.6V |
| PWM Output Frequency | 20.5 kHz typ; OUT+ and OUT-; TA=25°C, VDD=3.6V |
| Control Interface | I2C-controlled digital playback engine; feature list |
| Supported Actuator Types | LRA and ERM; product description |
| Digital Interface Compatibility | 1.8 V compatible, VDD tolerant; feature list |
| VDD Pin Requirement | 0.1 µF capacitor required; pin function table |
| REG Pin Requirement | 0.1 µF capacitor required; 1.8V regulator output pin |
| Datasheet Status | request_only |
Product Overview
The DRV2625 is a Texas Instruments closed-loop haptic driver categorized under Power_Management. It supports both LRA and ERM actuator types and uses an I2C-controlled digital playback engine. The digital interface is 1.8 V compatible and VDD tolerant, with SDA, SCL, NRST, and TRIG/INTZ input thresholds specified in the datasheet-derived electrical limits.
The recommended supply voltage is 2.7 to 5.5 V. Load-related conditions include 8 ohm load impedance, 100 pF load capacitance, and an LRA operating frequency range of 45 to 300 Hz. Timing parameters include 400 kHz maximum SCL frequency, 1 ms maximum device startup from shutdown to standby, and 1 ms maximum waveform startup from trigger to output signal.
The device is offered in a DSBGA (YFF), 9-pin package with a nominal body size of 1.498 mm x 1.361 mm. Assembly support requirements include a 0.1 µF capacitor on VDD and a 0.1 µF capacitor on the REG 1.8 V regulator output pin.
Key Features
- Closed-loop haptic driver for LRA and ERM actuators
- I2C-controlled digital playback engine interface
- 2.7 to 5.5 V recommended supply range
- 45 to 300 Hz LRA frequency range
- 1.8 V compatible, VDD-tolerant digital interface
- 400 kHz maximum SCL bus frequency
- 1 ms maximum startup from shutdown to standby
- 20.5 kHz typical PWM output frequency
- 0.75 ohm typical output on-state resistance
- 9-pin DSBGA package with compact nominal dimensions
Typical Applications
- LRA haptic actuator drive
- ERM haptic actuator drive
- I2C-controlled vibration feedback
- Compact haptic modules
- Low-voltage haptic systems
- Touch feedback electronics
Procurement Notes
When requesting a quote for DRV2625, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What supply range does the DRV2625 use?
The DRV2625 recommended operating supply voltage is 2.7 to 5.5 V. Its supply-voltage absolute maximum rating is -0.3 to 6 V over the operating free-air temperature range.
Which actuator types are supported by DRV2625?
The extracted product description identifies DRV2625 as supporting both LRA and ERM actuator types. The recommended LRA frequency range is 45 to 300 Hz.
What interface is used to control the DRV2625?
DRV2625 uses an I2C-controlled digital playback engine. The extracted timing data specifies 400 kHz maximum SCL frequency, 0.6 µs minimum SCL high pulse duration, and 1.3 µs minimum SCL low pulse duration.
What capacitors are required on VDD and REG?
The extracted pin information states that the VDD pin requires a 0.1 µF capacitor. The REG pin, identified as the 1.8 V regulator output pin, also requires a 0.1 µF capacitor.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 12, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.