Specifications
| Type | Description |
|---|---|
| Part Number | DRV8701 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | 24-pin VQFN (RGE), 4.00 x 4.00 x 0.90 mm |
| Component Type | Power_IC |
| Motor driver topology | Single H-bridge gate driver; drives four external N-channel MOSFETs |
| Operating supply voltage | 5.9-45 V; recommended operating range, VM |
| Absolute maximum VM voltage | -0.3 to 47 V; referenced to GND |
| VM ramp rate | 0-2 V/us; absolute maximum rating |
| Gate drive voltage | 9.5 V; high-side and low-side FETs, nominal description |
| High-side VGS gate drive, VM > 12 V | 8.5 / 9.5 / 10.5 V min/typ/max; gate-to-source with respect to SHx |
| High-side VGS gate drive, VM = 8 V | 5.5 / 6.4 / 7 V min/typ/max; gate-to-source with respect to SHx |
| High-side VGS gate drive, VM = 5.9 V | 3.5 / 4.0 / 4.5 V min/typ/max; gate-to-source with respect to SHx |
| Low-side VGS gate drive, VM > 12 V | 8.5 / 9.3 / 10.5 V min/typ/max; gate-to-source |
| Low-side VGS gate drive, VM = 5.9 V | 3.9 / 4.3 / 4.9 V min/typ/max; gate-to-source |
| Gate source current range | 6-150 mA; adjustable gate drive, 5 levels |
| Gate sink current range | 12.5-300 mA; adjustable gate drive, 5 levels |
| Peak source current, RIDRIVE < 1 kOhm to GND | 6 mA |
| Peak source current, RIDRIVE = 33 kOhm to GND | 12.5 mA; RIDRIVE = 33 kOhm +/-5% to GND |
| Peak source current, RIDRIVE = 200 kOhm to GND | 25 mA; RIDRIVE = 200 kOhm +/-5% to GND, or RIDRIVE < 1 kOhm to AVDD |
| Peak source current, RIDRIVE > 500 kOhm to GND | 100 mA; RIDRIVE > 500 kOhm +/-5% to GND |
| Peak source current, RIDRIVE = 68 kOhm to AVDD | 150 mA; RIDRIVE = 68 kOhm +/-5% to AVDD |
| Control interface option, DRV8701E | PH/EN |
| Control interface option, DRV8701P | PWM |
| Logic input support | 1.8 V, 3.3 V, and 5 V; control logic inputs |
| Logic input voltage | 0-5.5 V; recommended operating condition, VCC |
| Input logic low voltage | 0.8 V max; PH, EN, IN1, IN2, nSLEEP |
| Input logic high voltage | 1.5 V min; PH, EN, IN1, IN2, nSLEEP |
| Input logic hysteresis | 100 mV typ; control inputs |
| Input logic low current | -5 to 5 uA; VIN = 0 V |
| Input logic high current | 78 uA typ; VIN = 5 V |
| Input pulldown resistance | 64 / 115 / 173 kOhm min/typ/max; control inputs |
| PWM frequency | 100 kHz max; applied PWM signal on PH/EN or IN1/IN2 |
| Propagation delay | 500 ns typ; PH/EN or IN1/IN2 to GHx/GLx |
| Output dead time | 380 ns typ; observed tDEAD depends on IDRIVE setting |
| Gate drive time | 2.5 us typ; FET gate drivers |
| VM operating supply current | 6 / 9.5 mA typ/max; VM = 24 V, nSLEEP high |
| VM sleep mode supply current, 25 C | 9 / 15 uA typ/max; nSLEEP = 0, TA = 25 C |
| VM sleep mode supply current, 125 C | 14 / 25 uA typ/max; nSLEEP = 0, VM = 24 V, TA = 125 C |
| Sleep time | 100 us typ; nSLEEP low to sleep mode |
| Wake-up time | 1 ms typ; nSLEEP high to output change |
| Turn-on time | 1 ms typ; VM > UVLO to output transition |
| DVDD regulator voltage | 3.0 / 3.3 / 3.5 V min/typ/max; external load 0 to 30 mA |
| AVDD regulator voltage | 4.4 / 4.8 / 5.2 V min/typ/max; external load 0 to 30 mA |
| AVDD external load current | 30 mA max; recommended operating condition; thermal limits must be observed |
| DVDD external load current | 30 mA max; recommended operating condition; thermal limits must be observed |
| VREF range | 0.3 V to AVDD; recommended RMS reference voltage range; operational at 0 to 0.3 V with degraded accuracy |
| Current shunt amplifier gain | 20 V/V; integrated current shunt amplifier |
| SO load current | 5 mA max; recommended shunt amplifier output current loading |
| SO output capacitance limit | 1 nF max; shunt amplifier output pin |
| VCP operating voltage, VM = 12 V | 20.5 / 21.5 / 22.5 V min/typ/max; IVCP = 0 to 12 mA |
| VCP operating voltage, VM = 8 V | 13.5 / 14.4 / 15 V min/typ/max; IVCP = 0 to 10 mA |
| VCP operating voltage, VM = 5.9 V | 9.4 / 9.9 / 10.4 V min/typ/max; IVCP = 0 to 8 mA |
| Charge pump current capacity, VM > 12 V | 12 mA |
| Charge pump current capacity, 8 V < VM < 12 V | 10 mA |
| Charge pump current capacity, 5.9 V < VM < 8 V | 8 mA |
| Charge pump switching frequency | 200 / 400 / 700 kHz min/typ/max; VM > UVLO |
| Open-drain output low voltage | 0.1 V typ; IO = 2 mA, nFAULT or SNSOUT |
| Open-drain high impedance leakage | -2 to 2 uA; VIN = 5 V, nFAULT or SNSOUT |
| Operating ambient temperature | -40 to 125 C; recommended operating condition |
| Operating junction temperature | -40 to 150 C; absolute maximum rating |
| Storage temperature | -65 to 150 C; absolute maximum rating |
| ESD rating, human body model | +/-2000 V |
| ESD rating, charged device model | +/-500 V |
| Junction-to-ambient thermal resistance | 34.8 C/W; RGE VQFN, 24 pins |
| Junction-to-case top thermal resistance | 37.1 C/W; RGE VQFN, 24 pins |
| Junction-to-board thermal resistance | 12.2 C/W; RGE VQFN, 24 pins |
| Junction-to-case bottom thermal resistance | 3.7 C/W; RGE VQFN, 24 pins |
| Datasheet Status | request_only |
Product Overview
The DRV8701 is a Texas Instruments brushed DC motor H-bridge gate driver for Power_Management designs. Its topology is a single H-bridge gate driver that drives four external N-channel MOSFETs, allowing the external power stage to be selected for the motor current and thermal requirements of the design.
The recommended VM operating supply range is 5.9 V to 45 V, with an absolute maximum VM rating of -0.3 V to 47 V referenced to GND and a VM ramp-rate limit of 0 V/us to 2 V/us. Gate-drive operation includes nominal 9.5 V drive, high-side and low-side VGS specifications across VM conditions, and adjustable gate-drive source and sink current settings.
Control support depends on variant: DRV8701E uses PH/EN control, while DRV8701P uses PWM control. Logic inputs support 1.8 V, 3.3 V, and 5 V systems, with 0.8 V maximum input-low and 1.5 V minimum input-high thresholds. The device is supplied in a 24-pin VQFN RGE package measuring 4.00 x 4.00 x 0.90 mm.
Key Features
- Single H-bridge gate driver for four N-channel MOSFETs
- 5.9 V to 45 V recommended VM operating range
- Nominal 9.5 V high-side and low-side gate drive
- Adjustable 6 mA to 150 mA gate source current
- Adjustable 12.5 mA to 300 mA gate sink current
- PH/EN control on DRV8701E variant
- PWM control on DRV8701P variant
- Supports 1.8 V, 3.3 V, and 5 V logic
- Integrated 20 V/V current shunt amplifier
- 100 kHz maximum applied PWM frequency
- -40 C to 125 C operating ambient range
- 24-pin VQFN RGE 4.00 x 4.00 mm package
Typical Applications
- Brushed DC motor H-bridge drives
- External MOSFET motor stages
- PH/EN motor control designs
- PWM motor control designs
- Current-sensed motor drive circuits
- 5.9 V to 45 V motor supplies
- Low-power sleep-mode motor systems
Procurement Notes
When requesting a quote for DRV8701, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What motor driver topology does the DRV8701 use?
The DRV8701 uses a single H-bridge gate-driver topology. It drives four external N-channel MOSFETs, so the external MOSFET bridge provides the motor power stage while the IC supplies gate-drive and control functions.
What VM supply range is recommended for the DRV8701?
The recommended VM operating supply range is 5.9 V to 45 V. The absolute maximum VM rating is -0.3 V to 47 V referenced to GND, and the VM ramp-rate absolute maximum is 0 V/us to 2 V/us.
Which control interfaces are available for DRV8701 variants?
The DRV8701E variant provides a PH/EN control interface, while the DRV8701P variant provides a PWM control interface. Control logic inputs support 1.8 V, 3.3 V, and 5 V logic systems.
What gate-drive current adjustment does the DRV8701 provide?
The DRV8701 provides five adjustable gate-drive levels. The gate source current range is 6 mA to 150 mA, and the gate sink current range is 12.5 mA to 300 mA.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 12, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.