Specifications
| Type | Description |
|---|---|
| Part Number | DRV8872 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | 8-pin HSOP with exposed PowerPAD, DDA package, 4.90 mm x 6.00 mm nominal body |
| Motor Driver Topology | H-bridge brushed DC motor driver; drives one DC motor, one winding of a stepper motor, or other inductive loads |
| Operating Supply Voltage | 6.5-45 V; recommended operating conditions, VM |
| Peak Output Current | 0-3.6 A; power dissipation and thermal limits must be observed |
| Typical Combined RDS(on) | 565 mOhm; high-side plus low-side FET, typical |
| High-Side FET On Resistance | 307 mOhm typ, 360 mOhm max; VM=24 V, I=1 A, fPWM=25 kHz, TA=25°C |
| Low-Side FET On Resistance | 258 mOhm typ, 320 mOhm max; VM=24 V, I=1 A, fPWM=25 kHz, TA=25°C |
| Absolute Maximum Supply Voltage | -0.3 to 50 V; VM, over operating free-air temperature range |
| Absolute Maximum Logic Input Voltage | -0.3 to 7 V; IN1, IN2 |
| Absolute Maximum Fault Pin Voltage | -0.3 to 6 V; nFAULT |
| Absolute Maximum Phase Node Voltage | -0.7 to VM + 0.7 V; OUT1, OUT2 continuous phase node pin voltage |
| Absolute Maximum Current Sense Input Voltage | -0.5 to 1 V; ISEN; transients of ±1 V for less than 25 ns acceptable |
| Absolute Maximum Output Current | 0-3.5 A; 100% duty cycle |
| Operating Junction Temperature | -40 to 150°C; absolute maximum rating, TJ |
| Storage Temperature | -65 to 150°C; absolute maximum rating, Tstg |
| HBM ESD Rating | ±6000 V; human-body model per ANSI/ESDA/JEDEC JS-001 |
| CDM ESD Rating | ±750 V; charged-device model per JEDEC JESD22-C101 |
| Recommended Logic Input Voltage | 0-5.5 V; IN1, IN2 |
| Logic Input PWM Frequency | 0-200 kHz; input pulse width at least 800 ns required for detection |
| Operating Ambient Temperature | -40 to 125°C; recommended operating conditions, TA |
| Junction-to-Ambient Thermal Resistance | 41.1°C/W; DDA HSOP, 8 pins |
| Junction-to-Case Top Thermal Resistance | 53.1°C/W; DDA HSOP, 8 pins |
| Junction-to-Board Thermal Resistance | 23.1°C/W; DDA HSOP, 8 pins |
| Junction-to-Top Characterization Parameter | 8.2°C/W; DDA HSOP, 8 pins |
| Junction-to-Board Characterization Parameter | 23°C/W; DDA HSOP, 8 pins |
| Junction-to-Case Bottom Thermal Resistance | 2.7°C/W; DDA HSOP, 8 pins |
| VM Operating Supply Current | 3 mA typ, 10 mA max; VM=12 V, TA=25°C |
| VM Sleep Current | 10 µA max; VM=12 V, TA=25°C |
| Turn-On Time | 40 µs typ, 50 µs max; VM > VUVLO with IN1 or IN2 high; applies at power-up and exiting sleep mode |
| Input Logic Low Voltage | 0.5 V max; IN1, IN2, TA=25°C |
| Input Logic High Voltage | 1.5 V min; IN1, IN2, TA=25°C |
| Input Logic Hysteresis | 0.5 V typ; IN1, IN2, TA=25°C |
| Input Logic Low Current | -1 to 1 µA; VIN=0 V, TA=25°C |
| Input Logic High Current | 33 µA typ, 100 µA max; VIN=3.3 V, TA=25°C |
| Input Pulldown Resistance | 100 kOhm typ; to GND |
| Propagation Delay | 0.7 µs typ, 1 µs max; INx to OUTx change |
| Time to Sleep | 1 ms typ, 1.5 ms max; inputs low to sleep |
| Output Dead Time | 220 ns typ; motor driver outputs, TA=25°C |
| Body Diode Forward Voltage | 0.8 V typ, 1 V max; IOUT=1 A |
| Current Regulation Trip Voltage | 0.32 V min, 0.35 V typ, 0.38 V max; ISEN voltage for current chopping |
| PWM Off Time | 25 µs typ; current regulation |
| PWM Blanking Time | 2 µs typ; current regulation |
| VM Undervoltage Lockout Falling Threshold | 6.1 V typ, 6.4 V max; VM falls until UVLO triggers |
| VM Undervoltage Lockout Rising Threshold | 6.3 V min, 6.5 V typ; VM rises until operation recovers |
| VM Undervoltage Hysteresis | 100 mV min, 180 mV typ; rising to falling threshold |
| Overcurrent Protection Trip Level | 3.7 A min, 4.5 A typ, 6.4 A max; protection circuits |
| Overcurrent Deglitch Time | 1.5 µs typ; protection circuits |
| Overcurrent Retry Time | 3 ms typ; protection circuits |
| Thermal Shutdown Temperature | 150°C min, 175°C typ; protection circuits |
| Thermal Shutdown Hysteresis | 40°C typ; protection circuits |
| nFAULT Output Low Voltage | 0.5 V max; IO=5 mA |
| nFAULT Output High Leakage Current | 1 µA max; VO=3.3 V |
| Control Interface | PWM control with two logic inputs; IN1 and IN2 control H-bridge states |
| Fault Reporting Output | nFAULT open-drain output pulls low; indicates UVLO, TSD, or OCP fault; connect to pullup resistor |
| Sleep Mode Entry | Both inputs low; IN1=0 and IN2=0; H-bridge disabled to High-Z, sleep entered after 1 ms |
| H-Bridge Forward State | OUT1=H, OUT2=L; IN1=1, IN2=0; current OUT1 to OUT2 |
| H-Bridge Reverse State | OUT1=L, OUT2=H; IN1=0, IN2=1; current OUT2 to OUT1 |
| H-Bridge Brake State | OUT1=L, OUT2=L; IN1=1, IN2=1; low-side slow decay |
| Datasheet Status | request_only |
Product Overview
The DRV8872 is a Texas Instruments brushed DC motor driver classified under Power_Management. Its H-bridge output stage is intended to drive one DC motor, one winding of a stepper motor, or other inductive loads. IN1 and IN2 provide two-input PWM control for forward, reverse, brake, and sleep states.
The recommended motor supply range is 6.5-45 V, with peak output current specified from 0-3.6 A when power dissipation and thermal limits are observed. Typical combined high-side plus low-side RDS(on) is 565 mOhm, with separate typical values of 307 mOhm for the high-side FET and 258 mOhm for the low-side FET under the stated test conditions.
The package is an 8-pin HSOP DDA with exposed PowerPAD and a 4.90 mm x 6.00 mm nominal body. Thermal data includes 41.1°C/W junction-to-ambient resistance and 2.7°C/W junction-to-case bottom resistance. Protection and reporting functions include nFAULT low assertion for UVLO, thermal shutdown, or overcurrent protection.
Key Features
- H-bridge topology for brushed DC motor drive
- 6.5-45 V recommended VM operating range
- 0-3.6 A peak output current rating
- 565 mOhm typical combined FET RDS(on)
- PWM control through IN1 and IN2 inputs
- 0-200 kHz supported logic input PWM frequency
- Current regulation with 0.35 V typical trip voltage
- Open-drain nFAULT output for UVLO, TSD, or OCP
- Sleep mode entered when both inputs are low
- 8-pin HSOP DDA package with exposed PowerPAD
Typical Applications
- Single brushed DC motor drive
- Stepper motor winding drive
- Other inductive load control
- PWM-controlled motor operation
- Forward and reverse motor control
- Low-side slow-decay braking
- Sleep-mode motor driver designs
Procurement Notes
When requesting a quote for DRV8872, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What type of motor does the DRV8872 drive?
The DRV8872 is a brushed DC motor driver using an H-bridge topology. It can drive one DC motor, one winding of a stepper motor, or other inductive loads according to the extracted datasheet facts.
What supply voltage range is recommended for DRV8872?
The recommended VM operating supply voltage range is 6.5-45 V. The absolute maximum VM rating is -0.3 to 50 V over the operating free-air temperature range.
How is the DRV8872 H-bridge controlled?
The device uses PWM control with two logic inputs, IN1 and IN2. These inputs select sleep, forward, reverse, and brake states, with a supported logic input PWM frequency range of 0-200 kHz.
What does the nFAULT pin report on DRV8872?
The nFAULT pin is an open-drain output that pulls low to indicate undervoltage lockout, thermal shutdown, or overcurrent protection. The extracted facts specify using a pullup resistor with this output.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 21, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.