DRV8880 Stepper Motor Driver

Texas Instruments Power_Management — specifications, applications, sourcing support and RFQ.

DRV8880 Stepper Motor Driver

RFQ Available Sourcing Support Alternative Matching RoHS
Part Number
DRV8880
Manufacturer
Texas Instruments
Package
28-pin HTSSOP PowerPAD, 9.70 mm x 4.40 mm; 28-pin WQFN with exposed thermal pad, 5.50 mm x 3.50 mm
Category
Power Management
Product Type
LDO Regulator

Quick Sourcing Note

DRV8880 from Texas Instruments is a Power_Management stepper motor driver supplied in 28-pin HTSSOP PowerPAD and 28-pin WQFN exposed-pad packages. It operates from a 6.5 to 45 V motor supply, supports 0 to 2.0 A full-scale motor current and 0 to 1.4 A RMS motor current, and accepts STEP rates from 0 to 100 kHz under recommended operating conditions. The device supports full-step through 1/16-step microstepping, smart tune, mixed, slow, and fast decay modes, and configurable 10 us, 20 us, or 30 us off-time PWM chopping. It is suited for stepper motor drive and microstepping motion-control designs requiring defined thermal and protection limits.

Specifications

TypeDescription
Part NumberDRV8880
ManufacturerTexas Instruments
Product TypeLDO Regulator
CategoryPower Management
Component TypePower_IC
Package / Case28-pin HTSSOP PowerPAD, 9.70 mm x 4.40 mm; 28-pin WQFN with exposed thermal pad, 5.50 mm x 3.50 mm
Operating supply voltage range6.5 to 45 V; recommended operating conditions, VM
Absolute maximum power supply voltage-0.3 to 50 V; VM referenced to GND
Power supply voltage ramp rate0 to 2 V/us; VM absolute maximum rating
Motor full-scale current0 to 2.0 A; recommended operating conditions, IFS
Motor RMS current0 to 1.4 A; recommended operating conditions, Irms
Applied STEP signal frequency0 to 100 kHz; recommended operating conditions; STEP input can operate up to 1 MHz but system bandwidth is motor-load limited
Digital pin voltage range0 to 5.3 V; recommended operating conditions, VIN
Reference RMS voltage range0.3 to V3P3 V; recommended operating conditions, VREF; operational near 0 to 0.3 V with degraded accuracy
V3P3 external load current0 to 10 mA; recommended operating conditions
Operating ambient temperature-40 to 125 °C; recommended operating conditions, TA
Operating junction temperature-40 to 150 °C; absolute maximum rating, TJ
Storage temperature-65 to 150 °C; absolute maximum rating, Tstg
Internal regulator voltage absolute maximum-0.3 to 3.8 V; V3P3 referenced to GND
Internal regulator current output absolute maximum0 to 10 mA; V3P3
Control pin voltage absolute maximum-0.3 to 7.0 V; STEP, DIR, ENABLE, nSLEEP, nFAULT, M0, M1, DECAY0, DECAY1, TRQ0, TRQ1, ATE
Open-drain output current absolute maximum0 to 10 mA; nFAULT
Reference input pin voltage absolute maximum-0.3 to 4.1 V; VREF
Continuous phase node pin voltage-0.7 to VM+0.7 V; AOUT1, AOUT2, BOUT1, BOUT2 absolute maximum rating
Continuous shunt amplifier input pin voltage-0.55 to 0.55 V; AISEN, BISEN; transients of +/-1 V for less than 25 ns acceptable
Peak drive currentInternally limited; AOUT1, AOUT2, BOUT1, BOUT2, AISEN, BISEN
HBM ESD rating+/-4000 V; ANSI/ESDA/JEDEC JS-001
CDM ESD rating+/-1000 V; JEDEC JESD22-C101
VM operating supply current8 mA typ, 18 mA max; nSLEEP high, ENABLE high, no motor load, VM=24 V
VM sleep mode supply current28 uA typ; nSLEEP low, VM=24 V, TA=25°C
VM sleep mode supply current77 uA max; nSLEEP low, VM=24 V, TA=125°C
Sleep time100 us typ; nSLEEP low to sleep mode
Wake-up time1.5 ms typ; nSLEEP high to output transition
Turn-on time1.5 ms typ; VM > VUVLO2 to output transition
LDO regulator voltage2.9 V min, 3.3 V typ, 3.6 V max; external load 0 to 10 mA
Charge pump operating voltageVM+11.5 V typ; VM > 12 V
Charge pump operating voltage2 x VM - 1.5 V typ; VUVLO2 < VM < 12 V
Charge pump switching frequency175 to 715 kHz; VM > VUVLO2; specified by design and characterization
Logic input low voltage0 to 0.6 V; STEP, DIR, ENABLE, nSLEEP, TRQ0, TRQ1, ATE
Logic input high voltage1.6 to 5.3 V; STEP, DIR, ENABLE, nSLEEP, TRQ0, TRQ1, ATE
Logic input hysteresis100 mV typ; STEP, DIR, ENABLE, nSLEEP, TRQ0, TRQ1, ATE
Logic input low current-1 to 1 uA; VIN=0 V
Logic input high current50 uA typ, 100 uA max; VIN=5.0 V
Logic input pulldown resistance100 kOhm typ; measured between pin and GND
STEP propagation delay450 ns typ; STEP input to current change
Tri-level input low voltage0 to 0.6 V; M0, M1, DECAY0, DECAY1, TOFF
Tri-level input Hi-Z voltage1.1 V typ; M0, M1, DECAY0, DECAY1, TOFF
Tri-level input high voltage1.6 to 5.3 V; M0, M1, DECAY0, DECAY1, TOFF
Tri-level input hysteresis100 mV typ; M0, M1, DECAY0, DECAY1, TOFF
Tri-level input low current-55 to -35 uA; VIN=0 V
Tri-level input Hi-Z current15 uA typ; VIN=1.3 V
Tri-level input high current85 uA typ; VIN=3.3 V
Tri-level pulldown resistance40 kOhm typ; measured between pin and GND
Tri-level pullup resistance45 kOhm typ; measured between V3P3 and pin
nFAULT output logic low voltage0.5 V max; IO=4 mA
nFAULT output high leakage-1 to 1 uA; external pullup resistor to 3.3 V
High-side FET on-resistance330 mOhm typ; VM=24 V, I=1 A, TA=25°C
High-side FET on-resistance400 mOhm typ, 440 mOhm max; VM=24 V, I=1 A, TA=125°C
High-side FET on-resistance430 mOhm typ; VM=6.5 V, I=1 A, TA=25°C
High-side FET on-resistance500 mOhm typ, 560 mOhm max; VM=6.5 V, I=1 A, TA=125°C
Low-side FET on-resistance300 mOhm typ; VM=24 V, I=1 A, TA=25°C
Low-side FET on-resistance370 mOhm typ, 400 mOhm max; VM=24 V, I=1 A, TA=125°C
Low-side FET on-resistance370 mOhm typ; VM=6.5 V, I=1 A, TA=25°C
Low-side FET on-resistance450 mOhm typ, 490 mOhm max; VM=6.5 V, I=1 A, TA=125°C
Microstepping resolutionFull-step to 1/16-step; M0 and M1 microstepping mode setting pins
Decay modesSmart tune, mixed decay, slow decay, fast decay; device feature description
Off-time PWM chopping options10 us, 20 us, or 30 us; configurable off-time PWM chopping
Thermal resistance junction-to-ambient33.1 °C/W for PWP HTSSOP; 37.5 °C/W for RHR WQFN; thermal information, 28 pins
Thermal resistance junction-to-case top16.6 °C/W for PWP HTSSOP; 23.0 °C/W for RHR WQFN; thermal information, 28 pins
Thermal resistance junction-to-board14.4 °C/W for PWP HTSSOP; 8.0 °C/W for RHR WQFN; thermal information, 28 pins
Thermal resistance junction-to-case bottom1.3 °C/W for PWP HTSSOP; 1.7 °C/W for RHR WQFN; thermal information, 28 pins
Datasheet Statusrequest_only

Product Overview

The DRV8880 is a Texas Instruments Power_Management Power_IC for stepper motor drive functions. Its recommended motor supply range is 6.5 to 45 V, with an absolute maximum VM range of -0.3 to 50 V and a VM ramp-rate limit of 0 to 2 V/us. Recommended motor current limits are 0 to 2.0 A full-scale and 0 to 1.4 A RMS.

Control is provided through STEP, DIR, ENABLE, nSLEEP, torque, decay, and microstepping pins. The STEP input is specified for 0 to 100 kHz in recommended operating conditions, while the datasheet notes the STEP input can operate up to 1 MHz with system bandwidth limited by the motor and load. Microstepping spans full-step to 1/16-step using M0 and M1.

The device is offered in 28-pin HTSSOP PowerPAD and 28-pin WQFN exposed-thermal-pad packages. Thermal data includes 33.1 °C/W junction-to-ambient for PWP HTSSOP and 37.5 °C/W for RHR WQFN, supporting package-aware board and assembly planning for stepper motor applications.

Key Features

  • 6.5 to 45 V recommended motor supply range
  • 0 to 2.0 A full-scale motor current
  • 0 to 1.4 A RMS motor current
  • STEP signal frequency specified from 0 to 100 kHz
  • Full-step to 1/16-step microstepping resolution
  • Smart tune, mixed, slow, and fast decay modes
  • 10 us, 20 us, or 30 us PWM off-time options
  • 2.9 V to 3.6 V LDO regulator output
  • 100 us typical sleep entry time
  • 1.5 ms typical wake-up and turn-on times

Typical Applications

  • Stepper motor drive designs
  • Microstepping motion control
  • PWM-chopped motor current control
  • Sleep-enabled motor systems
  • Fault-monitored stepper drivers
  • Thermally constrained motor boards

Procurement Notes

When requesting a quote for DRV8880, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.

FAQ

What supply voltage range does the DRV8880 support?

The DRV8880 is specified for a recommended VM operating supply range of 6.5 to 45 V. The absolute maximum VM rating is -0.3 to 50 V referenced to GND, with a VM ramp-rate limit of 0 to 2 V/us.

What motor current ratings are specified for DRV8880?

Under recommended operating conditions, the DRV8880 supports 0 to 2.0 A motor full-scale current and 0 to 1.4 A motor RMS current. The peak drive current is internally limited on the output and sense pins.

Which package options are listed for the DRV8880?

The listed package options are a 28-pin HTSSOP PowerPAD measuring 9.70 mm x 4.40 mm and a 28-pin WQFN with exposed thermal pad measuring 5.50 mm x 3.50 mm.

What microstepping and decay modes does the DRV8880 provide?

The DRV8880 supports full-step through 1/16-step microstepping using the M0 and M1 mode pins. Its decay-mode options include smart tune, mixed decay, slow decay, and fast decay, with configurable 10 us, 20 us, or 30 us off-time PWM chopping.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 21, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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