Specifications
| Type | Description |
|---|---|
| Part Number | DRV8885 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Component Type | Power_IC |
| Package / Case | 24-pin HTSSOP PowerPAD, 7.80 mm x 4.40 mm; 28-pin WQFN, 5.50 mm x 3.50 mm |
| Motor driver architecture | Two N-channel power MOSFET H-bridge drivers; integrated in device |
| Microstepping resolution | Up to 1/16 microstepping; STEP/DIR interface |
| Operating supply voltage | 8.0 to 37 V; recommended operating range |
| Maximum VM absolute rating | -0.3 to 40 V; absolute maximum rating |
| VM ramp rate absolute rating | 0 to 2 V/us; absolute maximum rating |
| Full-scale motor current | 0 to 1.5 A; recommended operating condition, IFS |
| RMS motor current | 0 to 1.0 A; recommended operating condition, Irms |
| Peak drive current | 2.3 A; AOUT1, AOUT2, BOUT1, BOUT2 absolute maximum rating |
| Output MOSFET on-resistance | 0.86 ohm; HS + LS, VM=24 V, TA=25°C |
| Full-scale current accuracy | +/-6.25%; integrated current sense full-scale current accuracy |
| VM operating supply current | 5 mA typ, 8 mA max; VM approximately 8 to 35 V, ENABLE=1, nSLEEP=1, no motor load |
| VM sleep mode supply current | 20 uA typ; nSLEEP=0, TA=25°C |
| VM sleep mode supply current at high temperature | 40 uA typ; nSLEEP=0, TA=125°C; not production tested |
| Sleep time | 50 us typ, 200 us max; nSLEEP=0 to sleep mode |
| Wake-up time | 0.85 ms typ, 1.5 ms max; nSLEEP=1 to output transition |
| Turn-on time | 0.85 ms typ, 1.5 ms max; VM > UVLO to output transition |
| DVDD internal regulator voltage | 2.9 V min, 3.3 V typ, 3.6 V max; 0 to 1 mA external load |
| AVDD internal regulator voltage | 4.5 V min, 5.0 V typ, 5.5 V max; no external load |
| VCP operating voltage | VM + 5.5 V typ; VM > 8 V |
| Logic input voltage range | 0 to 5.3 V; recommended operating condition, VCC |
| Logic input low voltage | 0 to 0.8 V; STEP, DIR, ENABLE, nSLEEP, M1 |
| Logic input high voltage | 1.6 to 5.3 V; STEP, DIR, ENABLE, nSLEEP, M1 |
| Logic input hysteresis | 100 mV typ; STEP, DIR, ENABLE, nSLEEP, M1 |
| Logic input pulldown resistance | 100 kohm typ; to GND |
| STEP propagation delay | 1.2 us typ; STEP to current change |
| Applied STEP signal frequency | 0 to 100 kHz; recommended operating condition; STEP input can operate up to 500 kHz but system bandwidth is limited by motor load |
| Operating ambient temperature | -40 to 125°C; recommended operating condition |
| Operating junction temperature | -40 to 150°C; absolute maximum rating |
| Storage temperature | -65 to 150°C; absolute maximum rating |
| ESD rating, HBM | +/-2000 V; per ANSI/ESDA/JEDEC JS-001 |
| ESD rating, CDM | +/-500 V; per JEDEC JESD22-C101 |
| Thermal resistance junction-to-ambient | 36.1°C/W HTSSOP; 33.6°C/W WQFN; RthetaJA |
| Thermal resistance junction-to-case bottom | 1.1°C/W HTSSOP; 3.7°C/W WQFN; RthetaJC(bot) |
| Protection features | VM UVLO, charge pump undervoltage, overcurrent protection, thermal shutdown, nFAULT indication; internal protection functions |
| Datasheet Status | request_only |
Product Overview
The DRV8885 is a Texas Instruments stepper motor driver in the Power_Management category. Its motor-drive stage uses two integrated N-channel power MOSFET H-bridge drivers, with a STEP/DIR control interface that supports up to 1/16 microstepping. The output MOSFET on-resistance is specified as 0.86 ohm for high-side plus low-side at VM = 24 V and TA = 25°C.
Recommended operating conditions include an 8.0 to 37 V motor supply, 0 to 1.5 A full-scale motor current, 0 to 1.0 A RMS motor current, and -40 to 125°C ambient operation. Logic inputs support a 0 to 5.3 V range, with defined low and high thresholds for STEP, DIR, ENABLE, nSLEEP, and M1.
Package options are a 24-pin HTSSOP PowerPAD measuring 7.80 mm x 4.40 mm and a 28-pin WQFN measuring 5.50 mm x 3.50 mm. Internal protection functions include VM UVLO, charge pump undervoltage, overcurrent protection, thermal shutdown, and nFAULT indication for system fault reporting.
Key Features
- Two integrated N-channel MOSFET H-bridge drivers
- STEP/DIR interface with up to 1/16 microstepping
- 8.0 to 37 V recommended motor supply range
- 0 to 1.5 A full-scale motor current
- 0 to 1.0 A RMS motor current
- 0.86 ohm HS plus LS on-resistance at 24 V
- Integrated current sense with +/-6.25% full-scale accuracy
- 0 to 100 kHz recommended STEP signal frequency
- Sleep mode current down to 20 uA typical at 25°C
- VM UVLO, overcurrent, thermal shutdown, and nFAULT protection
Typical Applications
- STEP/DIR stepper motor axes
- Microstepping motion control
- 8 to 37 V motor systems
- 1 A RMS stepper loads
- Logic-controlled motor drive modules
- Fault-monitored motor drive circuits
Procurement Notes
When requesting a quote for DRV8885, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What motor driver architecture does the DRV8885 use?
The DRV8885 integrates two N-channel power MOSFET H-bridge drivers. This architecture is specified for the device and supports its stepper motor driver function through the STEP/DIR interface.
What supply voltage range is recommended for DRV8885 operation?
The recommended operating supply voltage for the DRV8885 motor supply is 8.0 to 37 V. The VM absolute maximum rating is -0.3 to 40 V, with a VM ramp rate absolute rating of 0 to 2 V/us.
What microstepping resolution does the DRV8885 support?
The DRV8885 supports up to 1/16 microstepping when used through its STEP/DIR interface. The applied STEP signal frequency is specified from 0 to 100 kHz as a recommended operating condition.
Which package options are specified for the DRV8885?
The DRV8885 is specified in a 24-pin HTSSOP PowerPAD package measuring 7.80 mm x 4.40 mm and a 28-pin WQFN package measuring 5.50 mm x 3.50 mm.
What protection functions are integrated in the DRV8885?
Internal protection functions listed for the DRV8885 include VM undervoltage lockout, charge pump undervoltage, overcurrent protection, thermal shutdown, and nFAULT indication.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 22, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.