Specifications
| Type | Description |
|---|---|
| Part Number | FDMS8050 |
| Manufacturer | ON Semiconductor |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | Power 56 / PQFN08J, approx. 5.10 mm x 6.25 mm package outline |
| Drain to Source Voltage | 30 V; Maximum rating, TA=25°C |
| Gate to Source Voltage | ±20 V; Maximum rating; negative VGS rating for low duty cycle pulse occurrence only |
| Continuous Drain Current | 200 A; TC=25°C |
| Continuous Drain Current | 55 A; TA=25°C, Note 1a |
| Pulsed Drain Current | 400 A; Pulse limited by junction temperature, td ≤ 100 µs |
| Single Pulse Avalanche Energy | 1536 mJ; Starting TJ=25°C, L=3 mH, IAS=32 A, VDD=30 V, VGS=10 V |
| Power Dissipation | 156 W; TC=25°C |
| Power Dissipation | 2.7 W; TA=25°C, Note 1a |
| Operating Junction Temperature Range | -55 to +150 °C; Maximum rating |
| Storage Junction Temperature Range | -55 to +150 °C; Maximum rating |
| Thermal Resistance Junction to Case | 0.83 °C/W; Guaranteed by design |
| Thermal Resistance Junction to Ambient | 45 °C/W; Mounted on 1 in² pad, 2 oz copper, 1.5 x 1.5 in FR-4 board |
| Drain to Source Breakdown Voltage | min 30 V; ID=750 µA, VGS=0 V |
| Breakdown Voltage Temperature Coefficient | typ 20 mV/°C; ID=750 µA, referenced to 25°C |
| Zero Gate Voltage Drain Current | max 1 µA; VDS=24 V, VGS=0 V |
| Gate to Source Leakage Current | max 100 nA; VGS=20 V, VDS=0 V |
| Gate to Source Threshold Voltage | min 1.0 V, typ 1.8 V, max 3.0 V; VGS=VDS, ID=750 µA |
| Gate Threshold Voltage Temperature Coefficient | typ -6 mV/°C; ID=750 µA, referenced to 25°C |
| Static Drain to Source On Resistance | typ 0.5 mΩ, max 0.65 mΩ; VGS=10 V, ID=55 A |
| Static Drain to Source On Resistance | typ 0.7 mΩ, max 0.9 mΩ; VGS=4.5 V, ID=47 A |
| Static Drain to Source On Resistance | typ 0.7 mΩ, max 0.9 mΩ; VGS=10 V, ID=55 A, TJ=125°C |
| Forward Transconductance | typ 333 S; VDS=5 V, ID=55 A |
| Input Capacitance | typ 16150 pF, max 22610 pF; VDS=15 V, VGS=0 V, f=1 MHz |
| Output Capacitance | typ 4455 pF, max 6240 pF; VDS=15 V, VGS=0 V, f=1 MHz |
| Reverse Transfer Capacitance | typ 220 pF, max 310 pF; VDS=15 V, VGS=0 V, f=1 MHz |
| Gate Resistance | typ 1.0 Ω, max 3.0 Ω; TJ=25°C |
| Turn-On Delay Time | typ 29 ns, max 47 ns; VDD=15 V, ID=55 A, VGS=10 V, RGEN=6 Ω |
| Rise Time | typ 22 ns, max 36 ns; VDD=15 V, ID=55 A, VGS=10 V, RGEN=6 Ω |
| Turn-Off Delay Time | typ 87 ns, max 139 ns; VDD=15 V, ID=55 A, VGS=10 V, RGEN=6 Ω |
| Fall Time | typ 16 ns, max 28 ns; VDD=15 V, ID=55 A, VGS=10 V, RGEN=6 Ω |
| Total Gate Charge | typ 204 nC, max 285 nC; VGS=0 V to 10 V, VDD=15 V, ID=55 A |
| Total Gate Charge | typ 93 nC, max 130 nC; VGS=0 V to 4.5 V, VDD=15 V, ID=55 A |
| Gate to Source Charge | typ 41 nC; VDD=15 V, ID=55 A |
| Gate to Drain Miller Charge | typ 18 nC; VDD=15 V, ID=55 A |
| Source to Drain Diode Forward Voltage | typ 0.64 V, max 1.2 V; VGS=0 V, IS=2.2 A, pulse test |
| Source to Drain Diode Forward Voltage | typ 0.74 V, max 1.2 V; VGS=0 V, IS=55 A, pulse test |
| Reverse Recovery Time | typ 77 ns, max 124 ns; IF=55 A, di/dt=100 A/µs |
| Reverse Recovery Charge | typ 141 nC, max 226 nC; IF=55 A, di/dt=100 A/µs |
| Package Moisture Sensitivity Level | MSL1; Robust package design feature |
| Unclamped Inductive Load Test | 100% UIL tested; Feature statement |
| RoHS Compliance | RoHS Compliant; Feature statement |
| Ordering Quantity | 3000 units; 13 inch reel, 12 mm tape width |
| Datasheet Status | request_only |
Product Overview
The FDMS8050 is an ON Semiconductor N-channel PowerTrench MOSFET intended for Power_Management designs requiring a 30 V drain-to-source rated device. The extracted datasheet facts identify a Power 56 / PQFN08J package with an approximately 5.10 mm x 6.25 mm outline, plus a continuous drain-current rating of 200 A at TC=25°C and 55 A at TA=25°C under the stated board condition note.
Electrical parameters include a minimum 30 V drain-to-source breakdown voltage at ID=750 µA and VGS=0 V, a gate-to-source threshold range of 1.0 V minimum, 1.8 V typical, and 3.0 V maximum, and static drain-to-source on resistance values of typ 0.5 mΩ, max 0.65 mΩ at VGS=10 V and ID=55 A. The device is also characterized at VGS=4.5 V and at TJ=125°C.
Dynamic data includes input, output, and reverse-transfer capacitance at VDS=15 V and f=1 MHz; switching times at VDD=15 V, ID=55 A, VGS=10 V, and RGEN=6 Ω; and total gate charge at both 10 V and 4.5 V drive. Assembly and qualification-related facts include MSL1 package moisture sensitivity, RoHS compliance, 100% UIL testing, and 3000-unit ordering quantity on 13 inch reel, 12 mm tape.
Key Features
- 30 V drain-to-source maximum rating
- ±20 V gate-to-source maximum rating
- 200 A continuous drain current at TC=25°C
- 400 A pulsed drain current, td ≤ 100 µs
- Typ 0.5 mΩ on resistance at 10 V gate drive
- Typ 0.7 mΩ on resistance at 4.5 V gate drive
- 1536 mJ single-pulse avalanche energy rating
- MSL1 package moisture sensitivity level
- 100% UIL tested per feature statement
- RoHS compliant per datasheet feature statement
Typical Applications
- 30 V power switching
- High-current MOSFET stages
- Low-resistance power paths
- 4.5 V gate-drive circuits
- 10 V gate-drive circuits
- Avalanche-rated switching circuits
- Designs using PQFN08J footprint
Procurement Notes
When requesting a quote for FDMS8050, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What type of device is the FDMS8050?
The FDMS8050 is an ON Semiconductor N-channel PowerTrench MOSFET in the Power_Management category. The extracted package information lists Power 56 / PQFN08J with an approximately 5.10 mm x 6.25 mm outline.
What are the main voltage and current ratings?
The device has a 30 V drain-to-source maximum rating at TA=25°C, a ±20 V gate-to-source maximum rating, 200 A continuous drain current at TC=25°C, 55 A at TA=25°C under Note 1a, and 400 A pulsed drain current.
What on-resistance values are specified for FDMS8050?
Static drain-to-source on resistance is typ 0.5 mΩ and max 0.65 mΩ at VGS=10 V and ID=55 A. At VGS=4.5 V and ID=47 A, it is typ 0.7 mΩ and max 0.9 mΩ.
What package and assembly facts are available?
The package is listed as Power 56 / PQFN08J, approximately 5.10 mm x 6.25 mm. Extracted assembly-related facts include MSL1 package moisture sensitivity level, RoHS compliance, and ordering quantity of 3000 units on 13 inch reel with 12 mm tape width.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 21, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.