Specifications
| Type | Description |
|---|---|
| Part Number | INA157 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | SO-8 surface-mount / SOIC (D), 8 pins |
| Gain Configuration | G = 1/2 or G = 2; difference amplifier configuration |
| Offset Voltage Initial | typ ±100 µV, max ±500 µV; INA157UA max ±1000 µV; RTO, TA=25°C, VS=±15 V, RL=2 kΩ to ground, Ref grounded |
| Offset Voltage Drift | typ ±2 µV/°C, max ±20 µV/°C; RTO, VS=±15 V |
| Offset Voltage vs Power Supply | typ ±5 µV/V, max ±60 µV/V; VS=±4 V to ±18 V |
| Offset Voltage vs Time | typ 0.25 µV/month; RTO |
| Differential Input Impedance | typ 24 kΩ; internal resistor network |
| Common-Mode Input Impedance | typ 18 kΩ; internal resistor network |
| Positive Common-Mode Voltage Range | min 3(V+) - 7.5 V, typ 3(V+) - 6 V; VO=0 V, VS=±15 V |
| Negative Common-Mode Voltage Range | min 3(V-) + 7.5 V, typ 3(V-) + 3 V; VO=0 V, VS=±15 V |
| Common-Mode Rejection Ratio | min 86 dB, typ 96 dB; INA157UA min 80 dB; VCM=-37.5 V to +37.5 V, RS=0 Ω |
| Output Voltage Noise | typ 1.3 µVp-p; RTO, f=0.1 Hz to 10 Hz |
| Output Voltage Noise Density | typ 26 nV/√Hz; RTO, f=1 kHz |
| Initial Gain | 0.5 V/V; G=1/2 configuration |
| Gain Error | typ ±0.01%, max ±0.05%; INA157UA max ±0.1%; VO=-10 V to +10 V |
| Gain Drift | typ ±1 ppm/°C, max ±10 ppm/°C; VS=±15 V |
| Gain Nonlinearity | typ ±0.0001% of FS, max ±0.001% of FS; INA157UA max ±0.002% of FS; VO=-10 V to +10 V |
| Positive Output Voltage Swing | min (V+) - 2 V, typ (V+) - 1.8 V; VS=±15 V, RL=2 kΩ |
| Negative Output Voltage Swing | min (V-) + 2 V, typ (V-) + 1.6 V; VS=±15 V, RL=2 kΩ |
| Continuous Output Current Limit | typ ±60 mA; output short/current limit to common |
| Stable Capacitive Load | typ 500 pF; stable operation |
| Small-Signal Bandwidth | typ 4 MHz; -3 dB, VS=±15 V, G=1/2 |
| Slew Rate | typ 14 V/µs; VS=±15 V, G=1/2 |
| Settling Time to 0.1% | typ 2 µs; 10 V step, CL=100 pF |
| Settling Time to 0.01% | typ 3 µs; 10 V step, CL=100 pF |
| Overload Recovery Time | typ 3 µs; 50% overdrive |
| Rated Supply Voltage | ±15 V; recommended rated operation |
| Operating Supply Voltage Range | min ±4 V, max ±18 V; power supply operating range |
| Quiescent Current | typ ±2.4 mA, max ±2.9 mA; IO=0 mA, VS=±15 V |
| Specified Temperature Range | -40°C to +85°C; specified electrical performance range |
| Operating Temperature Range | -55°C to +125°C; device operation |
| Storage Temperature Range | -55°C to +125°C; storage |
| Thermal Resistance JA | typ 150°C/W; SO-8 surface-mount package |
| Absolute Maximum Supply Voltage | 40 V; V+ to V- |
| Absolute Maximum Input Voltage Range | ±80 V; absolute maximum rating |
| Absolute Maximum Output Short Circuit | Continuous; short circuit to ground |
| Absolute Maximum Junction Temperature | +150°C; absolute maximum rating |
| Lead Temperature | +300°C; soldering, 10 s |
| Pin 1 Function | Ref; SO-8 top view pin configuration |
| Pin 2 Function | -In; SO-8 top view pin configuration |
| Pin 3 Function | +In; SO-8 top view pin configuration |
| Pin 4 Function | V-; SO-8 top view pin configuration |
| Pin 5 Function | Sense; SO-8 top view pin configuration |
| Pin 6 Function | Output; SO-8 top view pin configuration |
| Pin 7 Function | V+; SO-8 top view pin configuration |
| Pin 8 Function | NC; SO-8 top view pin configuration |
| Internal Resistor Values | 12 kΩ and 6 kΩ matched resistor network; functional diagram and gain configurations |
| Internal Resistor Absolute Tolerance | ±20% absolute value; internal resistors ratio matched |
| Reference Input Impedance Requirement | <10 Ω source impedance recommended; signal applied to Ref terminal to maintain good CMRR |
| Source Impedance Mismatch Effect | 5 Ω mismatch degrades typical CMRR to approximately 77 dB RTO; input source impedances not nearly equal |
| Datasheet Status | request_only |
Product Overview
The INA157 is a Texas Instruments precision difference amplifier for Signal_Chain circuits that require defined gain, common-mode rejection, and integrated resistor matching. In difference amplifier configuration, the device supports G = 1/2 or G = 2, with internal 12 kΩ and 6 kΩ matched resistors. The internal resistors have ±20% absolute tolerance, while gain accuracy is defined by ratio matching.
For G = 1/2 operation, the initial gain is 0.5 V/V, with ±0.01% typical gain error and ±1 ppm/°C typical gain drift. Offset performance is specified at ±100 µV typical initial offset, ±2 µV/°C typical drift, and 0.25 µV/month typical offset versus time. Noise is specified at 1.3 µVp-p from 0.1 Hz to 10 Hz and 26 nV/√Hz at 1 kHz.
The device is supplied in an SO-8 surface-mount / SOIC (D), 8-pin package with Ref, -In, +In, V-, Sense, Output, V+, and NC pins. Supply operation is rated at ±15 V with an operating supply range from ±4 V to ±18 V. For signal applied to the Ref terminal, a source impedance below 10 Ω is recommended to maintain good CMRR.
Key Features
- G = 1/2 or G = 2 difference amplifier configuration
- 12 kΩ and 6 kΩ matched resistor network
- ±100 µV typical initial offset voltage
- 96 dB typical common-mode rejection ratio
- 4 MHz typical small-signal bandwidth at G=1/2
- 14 V/µs typical slew rate at G=1/2
- ±4 V to ±18 V operating supply range
- SO-8 surface-mount package with 8 pins
- 500 pF typical stable capacitive load
- Continuous output short circuit rating to ground
Typical Applications
- Difference amplifier signal paths
- Gain scaling at G=1/2
- Gain scaling at G=2
- Common-mode signal rejection
- Precision offset-sensitive signal conditioning
- SO-8 surface-mount assemblies
- Reference-driven output level shifting
Procurement Notes
When requesting a quote for INA157, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What gain configurations does the INA157 support?
The INA157 supports difference amplifier configurations with G = 1/2 or G = 2. In the G=1/2 configuration, the initial gain is specified as 0.5 V/V, using the device internal 12 kΩ and 6 kΩ matched resistor network.
What supply range is specified for the INA157?
The INA157 has a recommended rated supply voltage of ±15 V and an operating supply voltage range from ±4 V to ±18 V. The absolute maximum supply voltage rating is 40 V from V+ to V-.
What package and pin functions are defined for INA157?
INA157 is provided in an SO-8 surface-mount / SOIC (D), 8-pin package. The top-view pin functions are Ref, -In, +In, V-, Sense, Output, V+, and NC.
How should the Ref terminal be driven for CMRR?
When a signal is applied to the Ref terminal, the datasheet recommends source impedance below 10 Ω to maintain good CMRR. A 5 Ω input source impedance mismatch can degrade typical CMRR to approximately 77 dB RTO.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 7, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.