INA821 Precision Instrumentation Amplifier

Texas Instruments Signal_Chain - specifications, applications, sourcing support and RFQ.

INA821 Precision Instrumentation Amplifier

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Part Number
INA821
Manufacturer
Texas Instruments
Package
8-pin SOIC 4.90 mm x 3.91 mm; 8-pin VSSOP 3.00 mm x 3.00 mm; 8-pin WSON 3.00 mm x 3.00 mm
Category
Signal Chain
Product Type
Operational Amplifier

Quick Sourcing Note

INA821 from Texas Instruments is a Signal_Chain precision instrumentation amplifier offered in 8-pin SOIC, 8-pin VSSOP, and 8-pin WSON packages. It supports single-supply operation from 4.5 V to 36 V or dual supplies from ±2.25 V to ±18 V, with a specified temperature range of -40°C to +125°C. Gain is set with an external resistor using G = 1 + (49.4 kΩ / RG), supporting 1 to 10000 V/V. Key parameters include 10 µV typical input stage offset voltage, 7 nV/√Hz input stage voltage noise at 1 kHz, 4.7 MHz bandwidth at G=1, and 600 µA typical quiescent current.

Specifications

TypeDescription
Part NumberINA821
ManufacturerTexas Instruments
Product TypeOperational Amplifier
CategorySignal Chain
Package Case8-pin SOIC 4.90 mm x 3.91 mm; 8-pin VSSOP 3.00 mm x 3.00 mm; 8-pin WSON 3.00 mm x 3.00 mm
Input Stage Offset Voltage10 µV typ, 35 µV max; INA821ID and INA821DRG, TA=25°C, VS=±15 V, RL=10 kΩ, VREF=0 V, G=1
Input Stage Offset Voltage10 µV typ, 40 µV max; INA821IDGK, TA=25°C, VS=±15 V, RL=10 kΩ, VREF=0 V, G=1
Input Stage Offset Voltage Over Temperature75 µV max; INA821ID and INA821DRG, TA=-40°C to +125°C
Input Stage Offset Voltage Over Temperature80 µV max; INA821IDGK, TA=-40°C to +125°C
Input Stage Offset Voltage Drift0.1 µV/°C typ, 0.4 µV/°C max; TA=-40°C to +125°C
Output Stage Offset Voltage50 µV typ, 350 µV max; INA821ID and INA821DGK, TA=25°C
Output Stage Offset Voltage50 µV typ, 400 µV max; INA821DRG, TA=25°C
Output Stage Offset Voltage Over Temperature850 µV max; TA=-40°C to +125°C
Output Stage Offset Voltage Drift5 µV/°C typ; TA=-40°C to +125°C
Power Supply Rejection Ratio110 dB min, 120 dB typ; G=1, RTI
Power Supply Rejection Ratio114 dB min, 130 dB typ; G=10, RTI
Power Supply Rejection Ratio130 dB min, 135 dB typ; G=100, RTI
Power Supply Rejection Ratio136 dB min, 140 dB typ; G=1000, RTI
Differential Input Impedance100 GΩ || 1 pF; TA=25°C, VS=±15 V, G=1
Common-Mode Input Impedance100 GΩ || 7 pF; TA=25°C, VS=±15 V, G=1
RFI Filter -3 dB Frequency45 MHz; input RFI filter
Operating Input Range(V-) + 2 V to (V+) - 2 V; VS=±2.25 V to ±18 V
Input Overvoltage Range±40 V; TA=-40°C to +125°C
Common-Mode Rejection Ratio92 dB min, 105 dB typ; DC to 60 Hz, RTI, VCM=(V-)+2 V to (V+)-2 V, G=1
Common-Mode Rejection Ratio112 dB min, 125 dB typ; DC to 60 Hz, RTI, VCM=(V-)+2 V to (V+)-2 V, G=10
Common-Mode Rejection Ratio132 dB min, 145 dB typ; DC to 60 Hz, RTI, VCM=(V-)+2 V to (V+)-2 V, G=100
Common-Mode Rejection Ratio140 dB min, 150 dB typ; DC to 60 Hz, RTI, VCM=(V-)+2 V to (V+)-2 V, G=1000
Input Bias Current0.15 nA typ, 0.5 nA max; VCM=VS/2, TA=25°C
Input Bias Current Over Temperature2 nA max; VCM=VS/2, TA=-40°C to +125°C
Input Offset Current0.15 nA typ, 0.5 nA max; VCM=VS/2, TA=25°C
Input Offset Current Over Temperature2 nA max; VCM=VS/2, TA=-40°C to +125°C
Input Stage Voltage Noise7 nV/√Hz; f=1 kHz, G=100, RS=0 Ω
Input Stage Voltage Noise0.14 µVPP; fB=0.1 Hz to 10 Hz, G=100, RS=0 Ω
Output Stage Voltage Noise65 nV/√Hz; f=1 kHz, RS=0 Ω
Output Stage Voltage Noise2.5 µVPP; fB=0.1 Hz to 10 Hz, RS=0 Ω
Noise Current130 fA/√Hz; f=1 kHz
Noise Current4.7 pAPP; fB=0.1 Hz to 10 Hz, G=100
Gain EquationG = 1 + (49.4 kΩ / RG); external gain resistor between RG pins
Gain Range1 to 10000 V/V; external gain resistor configured
Gain Error±0.005% typ, ±0.025% max; G=1, VO=±10 V
Gain Error±0.025% typ, ±0.15% max; G=10, VO=±10 V
Gain Error±0.025% typ, ±0.15% max; G=100, VO=±10 V
Gain Error±0.05% typ; G=1000, VO=±10 V
Gain Drift±5 ppm/°C max; G=1, TA=-40°C to +125°C
Gain Drift±35 ppm/°C max; G>1, TA=-40°C to +125°C; excludes external gain resistor effects
Gain Nonlinearity1 ppm typ, 10 ppm max; G=1 to 10, VO=-10 V to 10 V, RL=10 kΩ
Gain Nonlinearity15 ppm max; G=100, VO=-10 V to 10 V, RL=10 kΩ
Gain Nonlinearity10 ppm max; G=1000, VO=-10 V to 10 V, RL=10 kΩ
Gain Nonlinearity30 ppm max; G=1 to 100, VO=-10 V to 10 V, RL=2 kΩ
Output Voltage Swing(V-) + 0.15 V to (V+) - 0.15 V; TA=25°C, VS=±15 V, RL=10 kΩ, G=1
Load Capacitance Stability1000 pF; stable capacitive load
Closed-Loop Output Impedance1.3 Ω; f=10 kHz
Short-Circuit Current±20 mA; continuous to VS/2
Bandwidth4.7 MHz; G=1, -3 dB
Bandwidth970 kHz; G=10, -3 dB
Bandwidth290 kHz; G=100, -3 dB
Bandwidth30 kHz; G=1000, -3 dB
Slew Rate2.0 V/µs; G=1, VO=±10 V
Settling Time6 µs; 0.01%, G=1 to 100, VSTEP=10 V
Settling Time40 µs; 0.01%, G=1000, VSTEP=10 V
Settling Time10 µs; 0.001%, G=1 to 100, VSTEP=10 V
Settling Time50 µs; 0.001%, G=1000, VSTEP=10 V
Reference Input Impedance10 kΩ; REF pin
Reference Input Voltage Range(V-) to (V+); REF pin
Reference Gain to Output1 V/V; REF pin to output
Reference Gain Error0.01%; REF pin to output
Single-Supply Voltage Range4.5 V min, 36 V max; recommended operating conditions
Dual-Supply Voltage Range±2.25 V min, ±18 V max; recommended operating conditions
Quiescent Current600 µA typ, 650 µA max; VIN=0 V, TA=25°C
Quiescent Current Over Temperature870 µA max; VIN=0 V, TA=-40°C to +125°C
Specified Temperature Range-40°C to +125°C; recommended operating conditions
Absolute Maximum Supply Voltage-20 V to 20 V; operating free-air temperature range
Absolute Maximum Signal Input Voltage-40 V to 40 V; signal input pins
Absolute Maximum REF Pin Voltage-20 V to 20 V; REF pin
Absolute Maximum Signal Output Voltage(−VS) − 0.5 V to (+VS) + 0.5 V; signal output pins
Junction Temperature175°C max; absolute maximum rating
Storage Temperature-65°C to +150°C; absolute maximum rating
HBM ESD Rating±1500 V; human-body model per ANSI/ESDA/JEDEC JS-001
CDM ESD Rating±750 V; charged-device model per JEDEC JESD22-C101
SOIC Thermal Resistance Junction-to-Ambient119.6°C/W; D package, 8 pins
VSSOP Thermal Resistance Junction-to-Ambient215.4°C/W; DGK package, 8 pins
WSON Thermal Resistance Junction-to-Ambient55.6°C/W; DRG package, 8 pins
Pin 1 FunctionNegative inverting input; -IN pin
Pin 4 FunctionPositive noninverting input; +IN pin
Pin 7 FunctionOutput; OUT pin
Gain Resistor PinsPins 2 and 3; place gain resistor between pin 2 and pin 3
Reference Pin RequirementMust be driven by a low impedance source; REF pin, pin 6
Datasheet Statusrequest_only

Product Overview

The INA821 is a Texas Instruments precision instrumentation amplifier for Signal_Chain designs requiring differential input amplification with externally configured gain. Pins 2 and 3 accept the gain resistor, and the gain equation is G = 1 + (49.4 kΩ / RG), allowing a gain range from 1 to 10000 V/V.

Electrical limits include 10 µV typical input stage offset voltage at G=1, 0.1 µV/°C typical input offset drift, input bias current of 0.15 nA typical, and input stage voltage noise of 7 nV/√Hz at 1 kHz with G=100. CMRR ranges from 92 dB minimum at G=1 to 140 dB minimum at G=1000, while PSRR ranges from 110 dB minimum at G=1 to 136 dB minimum at G=1000.

The device is available in 8-pin SOIC, VSSOP, and WSON packages. It operates from 4.5 V to 36 V single supply or ±2.25 V to ±18 V dual supply over -40°C to +125°C. The REF pin has 10 kΩ input impedance, 1 V/V gain to output, and must be driven by a low impedance source.

Key Features

  • Precision instrumentation amplifier for Signal_Chain designs
  • Gain range from 1 to 10000 V/V
  • External gain resistor uses G = 1 + 49.4 kΩ/RG
  • 10 µV typical input stage offset voltage
  • 7 nV/√Hz input stage voltage noise at 1 kHz
  • 4.7 MHz bandwidth at gain of 1
  • Single-supply operation from 4.5 V to 36 V
  • Dual-supply operation from ±2.25 V to ±18 V
  • Input overvoltage range is ±40 V
  • Specified temperature range is -40°C to +125°C

Typical Applications

  • Instrumentation amplifier circuits
  • Differential input measurement
  • Precision signal-chain amplification
  • High-gain signal conditioning
  • Low-noise signal amplification
  • Single-supply analog front ends
  • Dual-supply analog front ends

Procurement Notes

When requesting a quote for INA821, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.

FAQ

What type of device is the INA821?

The INA821 is a Texas Instruments precision instrumentation amplifier in the Signal_Chain category. Its gain is set with an external resistor between pins 2 and 3 using G = 1 + (49.4 kΩ / RG).

What supply ranges does the INA821 support?

The INA821 supports 4.5 V to 36 V single-supply operation and ±2.25 V to ±18 V dual-supply operation under recommended operating conditions. The specified temperature range is -40°C to +125°C.

What packages are listed for the INA821?

The listed package options are 8-pin SOIC measuring 4.90 mm x 3.91 mm, 8-pin VSSOP measuring 3.00 mm x 3.00 mm, and 8-pin WSON measuring 3.00 mm x 3.00 mm.

How should the INA821 REF pin be handled?

The REF pin is pin 6 and must be driven by a low impedance source. Its input impedance is 10 kΩ, its input voltage range is from V- to V+, and its gain to the output is 1 V/V.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 8, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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