Specifications
| Type | Description |
|---|---|
| Part Number | LM5022 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | 10-pin VSSOP (DGS), 3.00 mm x 3.00 mm nominal body |
| Controller topology | Low-side N-channel MOSFET controller; For boost and SEPIC regulators |
| Input voltage range | 6 V to 60 V; Startup regulator operating range |
| Post-startup minimum operating input voltage | Down to 3 V; After start-up |
| Internal startup regulator voltage rating | 60 V; Internal start-up regulator |
| MOSFET gate driver peak current | 1 A; OUT pin gate driver capability |
| Duty cycle limit | 90%; Feature list |
| Oscillator frequency range | Up to 2.2 MHz; PWM controller high-speed capability |
| Propagation delay | Less than 100 ns; Total propagation delays |
| Feedback reference voltage | 1.25 V; Non-inverting input of error amplifier |
| VIN absolute maximum voltage | -0.3 V to 65 V; VIN to GND |
| VCC absolute maximum voltage | -0.3 V to 16 V; VCC to GND |
| RT/SYNC absolute maximum voltage | -0.3 V to 5.5 V; RT/SYNC to GND |
| OUT absolute maximum negative voltage | -1.5 V; OUT to GND, for less than 100 ns |
| All other pins absolute maximum voltage | -0.3 V to 7 V; Pins to GND |
| Junction temperature absolute maximum | 150 °C; TJ |
| Storage temperature range | -65 °C to 150 °C; Tstg |
| HBM ESD rating | ±2000 V; ANSI/ESDA/JEDEC JS-001 |
| CDM ESD rating | ±750 V; JEDEC JESD22-C101 |
| Recommended supply voltage | 6 V to 60 V; Operating free-air temperature range |
| External VCC voltage | 7.5 V to 14 V; Recommended operating condition |
| Recommended junction temperature | -40 °C to 125 °C; Recommended operating condition |
| Junction-to-ambient thermal resistance | 161.5 °C/W; DGS VSSOP, 10 pins |
| Junction-to-case top thermal resistance | 56 °C/W; DGS VSSOP, 10 pins |
| Junction-to-board thermal resistance | 81.3 °C/W; DGS VSSOP, 10 pins |
| Junction-to-top characterization parameter | 5.7 °C/W; DGS VSSOP, 10 pins |
| Junction-to-board characterization parameter | 80 °C/W; DGS VSSOP, 10 pins |
| FB pin voltage | 1.225 V min, 1.25 V typ, 1.275 V max; TJ=-40 °C to 125 °C, VIN=24 V, RT=27.4 kΩ unless otherwise noted |
| VCC regulation | 6.6 V min, 7 V typ, 7.4 V max; 10 V ≤ VIN ≤ 60 V, ICC=1 mA |
| VCC regulation at low VIN | 5 V; 6 V ≤ VIN < 10 V, VCC pin open circuit |
| Supply current | 3.5 mA typ, 4 mA max; OUT pin capacitance=0, VCC=10 V |
| VCC current limit | 15 mA min, 35 mA typ; VCC=0 V |
| Dropout voltage across bypass switch | 200 mV typ; ICC=0 mA, fSW<200 kHz, 6 V ≤ VIN ≤ 8.5 V |
| Bypass switch turnoff threshold | 8.7 V typ; VIN increasing |
| Bypass switch threshold hysteresis | 260 mV typ; VIN decreasing |
| VCC pin output impedance | 58 Ω typ; VIN=6 V, 0 mA ≤ ICC ≤ 5 mA |
| VCC pin output impedance | 53 Ω typ; VIN=8 V, 0 mA ≤ ICC ≤ 5 mA |
| VCC pin output impedance | 1.6 Ω typ; VIN=24 V, 0 mA ≤ ICC ≤ 5 mA |
| VCC pin UVLO rising threshold | 5 V typ; VCC-HI |
| VCC pin UVLO falling hysteresis | 300 mV typ; VCC-HYS |
| Startup regulator leakage | 150 µA typ, 500 µA max; VIN=60 V |
| Shutdown current | 350 µA typ, 450 µA max; UVLO=0 V, VCC=open circuit |
| Error amplifier gain bandwidth | 4 MHz typ; GBW |
| Error amplifier DC gain | 75 dB typ; ADC |
| COMP pin current sink capability | 5 mA min, 17 mA typ; VFB=1.5 V, VCOMP=1 V |
| UVLO shutdown threshold | 1.22 V min, 1.25 V typ, 1.28 V max; VSD |
| UVLO shutdown hysteresis current source | 16 µA min, 20 µA typ, 24 µA max; ISD-HYS |
| Current limit delay to output | 30 ns typ; CS steps from 0 V to 0.6 V, OUT transitions to 90% of VCC |
| Current limit threshold voltage | 0.45 V min, 0.5 V typ, 0.55 V max; VCS |
| Leading edge blanking time | 65 ns typ; tBLK |
| CS pin sink impedance | 40 Ω typ, 75 Ω max; Blanking active |
| Soft-start current source | 7 µA min, 10 µA typ, 13 µA max; ISS |
| Soft-start to COMP offset | 0.35 V min, 0.55 V typ, 0.75 V max; VSS-OFF |
| Oscillator frequency | 170 kHz min, 200 kHz typ, 230 kHz max; RT to GND=84.5 kΩ |
| Oscillator frequency | 525 kHz min, 600 kHz typ, 675 kHz max; RT to GND=27.4 kΩ |
| Oscillator frequency | 865 kHz min, 990 kHz typ, 1115 kHz max; RT to GND=16.2 kΩ |
| Synchronization rising threshold | 3.8 V typ; VSYNC-HI |
| COMP to OUT transition delay | 25 ns typ; VCOMP=2 V, CS stepped from 0 V to 0.4 V |
| Minimum duty cycle | 0%; VCOMP=0 V |
| Maximum duty cycle | 90% min, 95% max; DMAX |
| COMP to PWM comparator gain | 0.33 V/V typ; APWM |
| COMP pin open-circuit voltage | 4.3 V min, 5.2 V typ, 6.1 V max; VFB=0 V |
| COMP pin short-circuit current | 0.6 mA min, 1.1 mA typ, 1.5 mA max; VCOMP=0 V, VFB=1.5 V |
| Slope compensation amplitude | 83 mV min, 110 mV typ, 137 mV max; VSLOPE |
| Output high saturation voltage | 0.25 V typ, 0.75 V max; VCC - VOUT, IOUT=50 mA |
| Output low saturation voltage | 0.25 V typ, 0.75 V max; VOUT, IOUT=100 mA |
| OUT pin rise time | 18 ns typ; OUT pin load=1 nF |
| OUT pin fall time | 15 ns typ; OUT pin load=1 nF |
| Thermal shutdown threshold | 165 °C typ; TSD |
| Thermal shutdown hysteresis | 25 °C typ; TSD-HYS |
| Datasheet Status | request_only |
Product Overview
The controller integrates a 1 A peak MOSFET gate driver, a PWM oscillator capable of operation up to 2.2 MHz, and total propagation delay below 100 ns. Control-loop parameters include a 1.25 V feedback reference, 4 MHz typical error-amplifier gain bandwidth, 75 dB typical DC gain, soft-start current source, slope compensation, leading-edge blanking, UVLO, and thermal shutdown.
Key Features
- Low-side N-channel MOSFET controller for boost and SEPIC regulators
- 6 V to 60 V startup regulator operating range
- Operates down to 3 V after startup
- 1 A peak MOSFET gate driver capability
- Oscillator frequency capability up to 2.2 MHz
- Less than 100 ns total propagation delay
- 1.25 V feedback reference at error amplifier
- Current-limit threshold is 0.5 V typical
- Leading-edge blanking time is 65 ns typical
- Thermal shutdown threshold is 165 °C typical
Typical Applications
- Boost regulator control
- SEPIC regulator control
- Low-side N-channel MOSFET power stages
- Wide-input power management designs
- Externally driven switching converters
- Synchronized PWM controller circuits
Procurement Notes
When requesting a quote for LM5022, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What type of controller is the LM5022?
The LM5022 is a Texas Instruments low-side boost/SEPIC controller. It is specified as a low-side N-channel MOSFET controller for boost and SEPIC regulators.
What input voltage range does the LM5022 support?
The startup regulator operating range is 6 V to 60 V. After startup, the device can operate with input voltage down to 3 V, according to the extracted datasheet facts.
What package is used for the LM5022?
The listed package is a 10-pin VSSOP with DGS package code. The nominal body size is 3.00 mm x 3.00 mm.
What are key switching and driver parameters?
The LM5022 includes a 1 A peak MOSFET gate driver, oscillator capability up to 2.2 MHz, less than 100 ns total propagation delay, and a maximum duty-cycle specification of 90% minimum to 95% maximum.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.