Specifications
| Type | Description |
|---|---|
| Part Number | LMG3522R030 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | RQS VQFN-52, 12.00 mm x 12.00 mm |
| Component Type | Power_IC |
| Drain-Source Voltage | 650 V max; FET off, absolute maximum rating |
| Drain-Source Switching Surge Voltage | 720 V max; FET switching, surge condition |
| Drain-Source Transient Ringing Peak Voltage | 800 V max; FET off, surge condition, t1 < 200 ns |
| VDD Pin Voltage | -0.3 to 20 V; absolute maximum rating, referenced to SOURCE |
| LDO5V Pin Voltage | -0.3 to 5.5 V; absolute maximum rating, referenced to SOURCE |
| VNEG Pin Voltage | -16 to 0.5 V; absolute maximum rating, referenced to SOURCE |
| IN Pin Voltage | -0.3 to 20 V; absolute maximum rating, referenced to SOURCE |
| FAULT/OC/ZVD/ZCD/TEMP Pin Voltage | -0.3 to LDO5V + 0.3 V; absolute maximum rating, referenced to SOURCE |
| RDRV Pin Voltage | -0.3 to 5.5 V; absolute maximum rating, referenced to SOURCE |
| Drain RMS Current | 55 A max; FET on, absolute maximum rating |
| Drain Pulsed Current | -125 A max; FET on, tp < 10 us, internally limited |
| Source Pulsed Current | 80 A max; FET off, tp < 1 us |
| Operating Junction Temperature | -40 to 150 °C; absolute maximum rating |
| Storage Temperature | -55 to 150 °C; absolute maximum rating |
| HBM ESD Rating | ±2000 V; human-body model per ANSI/ESDA/JEDEC JS-001 |
| CDM ESD Rating | ±500 V; charged-device model per ANSI/ESDA/JEDEC JS-002 |
| Recommended VDD Supply Voltage | 7.5 V min, 12 V nom, 18 V max; maximum switching frequency derated for VDD < 9 V |
| Recommended IN Input Voltage | 0 V min, 5 V nom, 18 V max |
| Recommended Drain RMS Current | 38 A max |
| LDO5V Positive Source Current | 25 mA max |
| RDRV External Slew-Rate Control Resistance | 0 to 500 kΩ; RDRV to SOURCE resistance |
| VNEG External Bypass Capacitance | 1 to 10 µF; VNEG to SOURCE capacitance |
| BBSW External Buck-Boost Inductance | 3 µH min, 4.7 µH nom, 10 µH max; BBSW to SOURCE inductance; >1 A current rating recommended |
| Junction-to-Case Top Thermal Resistance | 0.28 °C/W; RQS VQFN 52-pin package |
| Drain-Source On Resistance at 25 °C | 26 mΩ typ, 35 mΩ max; VIN = 5 V, TJ = 25 °C |
| Drain-Source On Resistance at 125 °C | 45 mΩ max; VIN = 5 V, TJ = 125 °C |
| Third-Quadrant Source-Drain Voltage at 0.1 A | 3.6 V typ; IS = 0.1 A |
| Third-Quadrant Source-Drain Voltage at 20 A | 3 V typ, 5 V max; IS = 20 A |
| Drain Leakage Current at 25 °C | 1 µA typ; VDS = 650 V, TJ = 25 °C |
| Drain Leakage Current at 125 °C | 10 µA typ; VDS = 650 V, TJ = 125 °C |
| Switching Frequency | 2 MHz |
| Slew Rate Adjustment Range | 20 to 150 V/ns; adjustable slew rate for switching performance and EMI mitigation |
| Temperature PWM Output Frequency | 9 kHz; TEMP push-pull digital output; temperature encoded as duty cycle |
| Datasheet Status | request_only |
Product Overview
LMG3522R030 is a Texas Instruments Power_Management power IC combining a 650V GaN FET with an integrated driver. The datasheet identifies the package as RQS VQFN-52 with a 12.00 mm x 12.00 mm body, and gives a junction-to-case top thermal resistance of 0.28 °C/W for this 52-pin package.
Electrical limits include 650 V maximum drain-source voltage with the FET off, 720 V maximum drain-source switching surge voltage, and 800 V maximum transient ringing peak voltage under the stated surge condition. Recommended operating values include a 7.5 V to 18 V VDD supply range with 12 V nominal, 0 V to 18 V IN input range with 5 V nominal, and 38 A maximum recommended drain RMS current.
The part supports 2 MHz switching and adjustable slew rate from 20 to 150 V/ns using the RDRV external resistance range of 0 to 500 kΩ. The TEMP output is a push-pull digital output with temperature encoded as duty cycle at 9 kHz, supporting monitored power-stage applications where switching behavior, EMI control, and thermal information are design inputs.
Key Features
- 650 V maximum drain-source voltage rating
- 720 V maximum switching surge voltage
- 800 V transient ringing peak voltage limit
- 55 A maximum absolute drain RMS current
- 38 A maximum recommended drain RMS current
- 2 MHz switching frequency specification
- 20 to 150 V/ns adjustable slew rate
- 26 mΩ typical on resistance at 25 °C
- 0.28 °C/W junction-to-case top thermal resistance
- 9 kHz temperature PWM output frequency
Typical Applications
- High-frequency power conversion
- 650 V GaN switching stages
- EMI-tuned power stages
- Thermally monitored power designs
- Compact VQFN power assemblies
- Driver-integrated GaN FET designs
Procurement Notes
When requesting a quote for LMG3522R030, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What type of device is LMG3522R030?
LMG3522R030 is a Texas Instruments Power_Management power IC described in the extracted facts as a 650V GaN FET with integrated driver. It is supplied in an RQS VQFN-52 package measuring 12.00 mm x 12.00 mm.
What drain-source voltage limits are specified?
The extracted datasheet facts list 650 V maximum drain-source voltage with the FET off, 720 V maximum drain-source switching surge voltage, and 800 V maximum transient ringing peak voltage for the stated surge condition with t1 below 200 ns.
What operating supply voltage is recommended?
The recommended VDD supply range is 7.5 V minimum, 12 V nominal, and 18 V maximum. The extracted fact also notes that maximum switching frequency is derated when VDD is below 9 V.
How is slew rate adjusted on this part?
The extracted facts specify a 20 to 150 V/ns slew rate adjustment range. RDRV external slew-rate control resistance is listed as 0 to 500 kΩ from RDRV to SOURCE.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 13, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.