Specifications
| Type | Description |
|---|---|
| Part Number | LP2951 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Component Type | Power_IC |
| Package / Case | D (SOIC, 8) 4.90 mm x 6.00 mm; DRG (SON/WSON, 8) 3.00 mm x 3.00 mm |
| Input Voltage Range | 2 V to 30 V; recommended operating conditions |
| Output Voltage Range | 1.2 V to 30 V; recommended operating conditions |
| Adjustable Output Range | VREF to 29 V; adjustable configuration using external resistor divider |
| Output Current | 0 mA to 100 mA; recommended operating conditions |
| Fixed Output Options | 3.3 V, 5.0 V; 3 V legacy chip option; OUTPUT tied to SENSE and FEEDBACK tied to VTAP |
| Output Voltage Accuracy, New Chip | ±1%; over line, load, and temperature |
| Output Voltage Accuracy, Legacy Chip | ±2%; over line, load, and temperature |
| Quiescent Current | 50 µA typ; new chip |
| Dropout Voltage | 340 mV typ; new chip |
| Operating Junction Temperature | -40 °C to 125 °C; recommended operating conditions |
| Output Capacitor | 1 µF min, 2.2 µF nom, 100 µF max; recommended operating conditions |
| Effective Output Capacitance | 0.5 µF min; required for stability |
| Output Capacitor ESR, New Chip | 0 Ω to 2 Ω; recommended operating conditions |
| Output Capacitor ESR, Legacy Chip | 30 mΩ to 5 Ω; recommended operating conditions |
| Input Capacitor | 1 µF; recommended from INPUT to ground |
| Feed-Forward Capacitor | 10 pF; optional, adjustable device only; required for stability if feedback divider current < 12 µA |
| Feedback Divider Current | 12 µA; adjustable device only |
| Absolute Maximum Input Voltage, New Chip | -0.3 V to 42 V |
| Absolute Maximum Input Voltage, Legacy Chip | -0.3 V to 35 V |
| Absolute Maximum Output Voltage | -0.3 V to VIN + 0.3 V, or 39 V max whichever is smaller |
| Shutdown Input Voltage, New Chip | -0.3 V to 42 V; absolute maximum rating |
| Shutdown Input Voltage, Legacy Chip | -1.5 V to 35 V; absolute maximum rating |
| ERROR Output Voltage, New Chip | -0.3 V to 39 V; can exceed input supply voltage |
| ERROR Output Voltage, Legacy Chip | -1.5 V to 30 V; can exceed input supply voltage |
| FEEDBACK Input Voltage, New Chip | -0.3 V to 5 V; absolute maximum rating |
| FEEDBACK Input Voltage, Legacy Chip | -1.5 V to 30 V; absolute maximum rating |
| Storage Temperature | -65 °C to 150 °C; absolute maximum rating |
| HBM ESD Rating, New Chip | ±3000 V; ANSI/ESDA/JEDEC JS-001, all pins |
| HBM ESD Rating, Legacy Chip | ±2500 V; ANSI/ESDA/JEDEC JS-001, all pins |
| CDM ESD Rating | ±1000 V; JEDEC JESD22-C101, all pins, legacy and new chip |
| 3.3 V Output Voltage at 25 °C | 3.2868 V min, 3.3 V typ, 3.3132 V max; new chip, IL=100 µA, TJ=25 °C |
| 3.3 V Output Voltage Across Temperature | 3.2736 V min, 3.3 V typ, 3.3264 V max; new chip, IL=100 µA, TJ=-40 °C to 125 °C |
| 5 V Output Voltage at 25 °C | 4.98 V min, 5 V typ, 5.02 V max; new chip, IL=100 µA, TJ=25 °C |
| 5 V Output Voltage Across Temperature | 4.96 V min, 5 V typ, 5.04 V max; new chip, IL=100 µA, TJ=-40 °C to 125 °C |
| Line Regulation | 0.0006 %/V typ, 0.01 %/V max; new chip, VIN = VOUT(NOM)+1 V to 30 V, TJ=25 °C |
| Load Regulation | 0.04 % typ, 0.1 % max; new chip, IL=100 µA to 100 mA, TJ=25 °C |
| Dropout Voltage at 100 mA | 340 mV typ, 420 mV max; new chip, VIN=2 V, IL=100 mA, TJ=25 °C |
| Ground Current at 100 µA Load | 50 µA typ, 65 µA max; new chip, IL=100 µA, TJ=25 °C |
| Ground Current at 100 mA Load | 0.8 mA typ, 0.9 mA max; new chip, IL=100 mA, TJ=-40 °C to 125 °C |
| UVLO Rising Threshold | 1.8 V min, 1.9 V typ, 2.0 V max; new chip, VIN rising, IL=100 µA, TJ=-40 °C to 125 °C |
| UVLO Falling Threshold | 1.7 V min, 1.8 V typ, 1.9 V max; new chip, VIN falling, IL=100 µA, TJ=-40 °C to 125 °C |
| UVLO Hysteresis | 100 mV typ; new chip |
| Current Limit | 180 mA min, 200 mA typ, 230 mA max; new chip, VOUT=0 V, TJ=-40 °C to 125 °C |
| Shutdown Function | Active-high disables device; low signal enables device |
| ERROR Output Function | Open-drain output goes low when VOUT drops by 6% of nominal value |
| Datasheet Status | request_only |
Product Overview
The LP2951 is a Texas Instruments 100 mA adjustable LDO regulator in the Power_Management category. It operates over a recommended 2 V to 30 V input range and provides a 1.2 V to 30 V output range, with adjustable output from VREF to 29 V when configured with an external resistor divider.
Fixed-output use is supported with 3.3 V and 5.0 V options, plus a 3 V legacy chip option, when OUTPUT is tied to SENSE and FEEDBACK is tied to VTAP. The new chip specifies ±1% output voltage accuracy over line, load, and temperature, while the legacy chip specifies ±2% under the same condition.
The device is available in D (SOIC, 8) 4.90 mm x 6.00 mm and DRG (SON/WSON, 8) 3.00 mm x 3.00 mm packages. Application use cases include adjustable low-current regulated rails, fixed 3.3 V or 5 V rails, shutdown-controlled rails, and monitored rails using the open-drain ERROR output that pulls low when VOUT drops by 6% of nominal value.
Key Features
- 2 V to 30 V recommended input voltage range
- 1.2 V to 30 V recommended output voltage range
- Adjustable output from VREF to 29 V
- 0 mA to 100 mA recommended output current
- 3.3 V and 5.0 V fixed output options
- ±1% new-chip accuracy over line, load, and temperature
- 50 µA typical new-chip quiescent current
- 340 mV typical new-chip dropout voltage
- Active-high shutdown input disables the regulator
- Open-drain ERROR output flags 6% output drop
Typical Applications
- Adjustable low-current regulated rails
- Fixed 3.3 V regulator rails
- Fixed 5 V regulator rails
- Shutdown-controlled power rails
- Voltage rails with ERROR monitoring
- 2 V to 30 V input systems
- 100 mA load regulation circuits
Procurement Notes
When requesting a quote for LP2951, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What input voltage range does the LP2951 support?
The LP2951 recommended operating input voltage range is 2 V to 30 V. Absolute maximum input voltage differs by chip version: -0.3 V to 42 V for the new chip and -0.3 V to 35 V for the legacy chip.
Can the LP2951 be used as an adjustable regulator?
Yes. In adjustable configuration with an external resistor divider, the LP2951 supports an adjustable output range from VREF to 29 V. The recommended output voltage range is 1.2 V to 30 V.
What output capacitor is required for LP2951 stability?
The recommended output capacitor range is 1 µF minimum, 2.2 µF nominal, and 100 µF maximum. The effective output capacitance must be at least 0.5 µF for stability.
How does the LP2951 shutdown input operate?
The LP2951 SHUTDOWN pin uses active-high logic. A high signal disables the device, and a low signal enables the device. The shutdown input absolute maximum rating depends on whether the device is the new or legacy chip.
What does the LP2951 ERROR output indicate?
The LP2951 ERROR pin is an open-drain output. It goes low when VOUT drops by 6% of the nominal value. The ERROR output voltage rating can exceed the input supply voltage within the listed absolute maximum limits.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 20, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.