Specifications
| Type | Description |
|---|---|
| Part Number | LP2985 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Component Type | Power_IC |
| Package / Case | DBV, 5-pin SOT-23, 2.9 mm × 2.8 mm |
| Input Voltage Range | 2.5-16 V; recommended operating condition, new chip |
| Input Voltage Range | 2.2-16 V; recommended operating condition, legacy chip |
| Output Voltage Range | 1.2-5.0 V; fixed output, new chip |
| Output Voltage Step Size | 100 mV; fixed output versions, new chip |
| Output Voltage Range | 1.2-10.0 V; recommended operating condition, legacy chip |
| Output Current | 0-150 mA; recommended operating condition |
| Output Voltage Accuracy | ±0.5 %; new chip, TJ=25°C, IOUT=1 mA to 150 mA |
| Output Voltage Accuracy Over Load and Temperature | ±1 %; new chip, IOUT=1 mA to 150 mA, -40°C ≤ TJ ≤ 125°C |
| Output Voltage Accuracy | ±1 %; legacy A-grade, TJ=25°C, IOUT=1 mA |
| Output Voltage Accuracy | ±1.5 %; legacy standard-grade, TJ=25°C, IOUT=1 mA |
| Line Regulation | 0.002 %/V typ, 0.014 %/V max; new chip, VO(NOM)+1 V ≤ VIN ≤ 16 V, TJ=25°C |
| Line Regulation | 0.002 %/V typ, 0.032 %/V max; new chip, VO(NOM)+1 V ≤ VIN ≤ 16 V, -40°C ≤ TJ ≤ 125°C |
| Dropout Voltage | 1 mV typ, 2.75 mV max; new chip, IOUT=0 mA, TJ=25°C |
| Dropout Voltage | 11.5 mV typ, 14 mV max; new chip, IOUT=1 mA, TJ=25°C |
| Dropout Voltage | 98 mV typ, 115 mV max; new chip, IOUT=10 mA, TJ=25°C |
| Dropout Voltage | 120 mV typ, 145 mV max; new chip, IOUT=50 mA, TJ=25°C |
| Dropout Voltage | 180 mV typ, 198 mV max; new chip, IOUT=150 mA, TJ=25°C |
| Ground Pin Current | 69 µA typ, 95 µA max; new chip, IOUT=0 mA, TJ=25°C |
| Ground Pin Current | 765 µA typ, 890 µA max; new chip, IOUT=150 mA, TJ=25°C |
| Shutdown Current | 1.12 µA typ, 2.75 µA max; new chip, VON/OFF < 0.15 V, VIN=16 V, -40°C ≤ TJ ≤ 125°C |
| Shutdown Current | 0.01 µA typ, 2 µA max; legacy chip, VON/OFF < 0.15 V, VIN=16 V, -40°C ≤ TJ ≤ 125°C |
| Output Noise Voltage | 30 µV RMS; with 10 nF bypass capacitor |
| Power Supply Rejection Ratio | 70 dB; new chip, f=1 kHz |
| Power Supply Rejection Ratio | 40 dB; new chip, f=1 MHz |
| Input Capacitor | 1 µF minimum; recommended operating condition, from VIN to GND |
| Output Capacitor | 2.2 µF nominal, 1 µF effective minimum; new chip; nominal capacitor values assumed to derate 50% |
| Output Capacitance Range | 1-200 µF; recommended operating condition, new chip |
| Output Capacitor ESR | 0-1 Ω; recommended operating condition, new chip |
| Operating Junction Temperature | -40°C to +125°C; recommended operating condition |
| Thermal Resistance Junction-to-Ambient | 178.6 °C/W; new chip, DBV SOT-23-5, JEDEC 2s2p PCB |
| Thermal Resistance Junction-to-Ambient | 205.4 °C/W; legacy chip, DBV SOT-23-5, JEDEC 2s2p PCB |
| Enable Input Low Threshold | 0.72 V; new chip, output OFF |
| Enable Input High Threshold | 0.85 V; new chip, output ON |
| Rising Bias Supply UVLO | 2.2 V min, 2.4 V max; new chip, VIN rising, -40°C ≤ TJ ≤ 125°C |
| Falling Bias Supply UVLO | 1.9 V; new chip, VIN falling, -40°C ≤ TJ ≤ 125°C |
| UVLO Hysteresis | 0.130 V; -40°C ≤ TJ ≤ 125°C |
| HBM ESD Rating | ±3000 V; new chip, ANSI/ESDA/JEDEC JS-001 |
| CDM ESD Rating | ±1000 V; new chip, JEDEC JESD22-C101 |
| Datasheet Status | request_only |
Product Overview
The LP2985 is a Texas Instruments Power_Management power IC identified as a low-noise low-dropout regulator. It is supplied in the DBV, 5-pin SOT-23 package with a 2.9 mm × 2.8 mm body, supporting compact regulated supply rails where output current requirements are up to 150 mA.
For the new chip, the recommended input range is 2.5 V to 16 V, with fixed output versions from 1.2 V to 5.0 V in 100 mV steps. Legacy-chip limits list 2.2 V to 16 V input operation and a 1.2 V to 10.0 V output-voltage operating range. New-chip output accuracy is specified at ±0.5% at 25°C and ±1% across load and -40°C to +125°C junction temperature.
The device includes enable and UVLO behavior, with new-chip enable thresholds of 0.72 V for output off and 0.85 V for output on. Capacitor requirements include a 1 µF minimum input capacitor and a new-chip output capacitance range of 1 µF to 200 µF with 0 Ω to 1 Ω ESR.
Key Features
- Low-noise LDO regulator for 0 mA to 150 mA loads
- New-chip input voltage range from 2.5 V to 16 V
- Fixed new-chip outputs from 1.2 V to 5.0 V
- 100 mV fixed-output step size on new-chip versions
- ±0.5% new-chip output accuracy at 25°C
- ±1% accuracy across load and junction temperature
- 30 µV RMS output noise with 10 nF bypass capacitor
- 70 dB PSRR at 1 kHz on new chip
- Enable input thresholds for output off and on control
- DBV 5-pin SOT-23 package, 2.9 mm × 2.8 mm
Typical Applications
- Low-noise regulated supply rails
- 150 mA point-of-load regulation
- Battery-powered regulated outputs
- Enable-controlled supply sequencing
- Compact SOT-23 power regulation
- Noise-sensitive analog supply rails
- Fixed-voltage embedded power rails
Procurement Notes
When requesting a quote for LP2985, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What input voltage range does the LP2985 support?
For the new chip, the recommended operating input voltage range is 2.5 V to 16 V. The extracted legacy-chip operating condition lists a wider lower-end range of 2.2 V to 16 V.
What output current is specified for the LP2985?
The recommended operating condition specifies an output current range of 0 mA to 150 mA. Dropout voltage and ground-pin current are characterized at several load points up to 150 mA.
What package is used for this LP2985 listing?
This LP2985 listing uses the DBV package case, described as a 5-pin SOT-23 with 2.9 mm × 2.8 mm dimensions. Thermal resistance values are provided for the DBV SOT-23-5 package on a JEDEC 2s2p PCB.
What capacitors are specified for LP2985 operation?
The input capacitor is specified as 1 µF minimum from VIN to GND. For the new chip, the output capacitor is 2.2 µF nominal with 1 µF effective minimum, and the recommended output capacitance range is 1 µF to 200 µF with 0 Ω to 1 Ω ESR.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 20, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.