Specifications
| Type | Description |
|---|---|
| Part Number | LP8733 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | 28-pin VQFN (RHD), 5.00 mm x 5.00 mm, thermal pad, wettable flanks |
| Input Voltage Range | 2.8 to 5.5 V; VIN_Bx and VANA pins must be connected to same supply line |
| LDO Input Voltage Range | 2.5 to 5.5 V; VIN_LDOx recommended operating condition |
| Ambient Operating Temperature | -40 to 125 °C; operating free-air temperature range |
| Junction Operating Temperature | -40 to 140 °C; recommended operating condition |
| Maximum Junction Temperature | 150 °C; absolute maximum rating |
| Storage Temperature | -65 to 150 °C; absolute maximum rating |
| Buck Output Voltage Range | 0.7 to 3.36 V; programmable voltage range |
| Buck Output Voltage Step Size | 10 mV; 0.7 V <= VOUT < 0.73 V |
| Buck Output Voltage Step Size | 5 mV; 0.73 V <= VOUT < 1.4 V |
| Buck Output Voltage Step Size | 20 mV; 1.4 V <= VOUT <= 3.36 V |
| Buck Output Current | 3 A; single-phase output |
| Buck Output Current | 6 A; dual-phase output |
| Buck Switching Frequency | 2 MHz; step-down DC/DC converters |
| Buck Output Voltage Slew Rate | 0.5 to 10 mV/us; programmable output-voltage slew rate |
| Minimum Buck Input-to-Output Voltage Difference | 0.8 V; minimum voltage between VIN_Bx and VOUT to fulfill electrical characteristics |
| LDO Output Voltage Range | 0.8 to 3.3 V; linear regulators |
| LDO Output Current | 300 mA; maximum output current per LDO |
| Buck Input Capacitance | 1.9 to 10 uF; effective capacitance from VIN_Bx to PGND_Bx |
| Buck Output Capacitance | 10 to 500 uF, 22 uF typical; effective capacitance per phase |
| Buck Point-of-Load Capacitance | 22 uF; optional POL capacitance |
| Total Buck Output Capacitance | 500 uF max; total output capacitance per phase, local and POL |
| LDO Input Capacitance | 0.6 to 2.2 uF; CIN_LDO must be at least two times larger than COUT_LDO |
| LDO Output Capacitance | 0.4 to 2.7 uF, 1 uF typical; effective capacitance |
| Capacitor ESR | 2 to 10 mohm; input and output capacitor ESR, 1 MHz to 10 MHz |
| Buck Inductor | 0.47 uH, -30%/+30%; inductance of the inductor |
| Inductor DCR | 25 mohm; buck inductor DCR |
| I2C Interface Speed | 100 kHz, 400 kHz, 1 MHz, 3.4 MHz; Standard, Fast, Fast+, and High-Speed modes |
| HBM ESD Rating | +/-2000 V; all pins, human-body model |
| CDM ESD Rating | +/-500 V all pins; +/-750 V corner pins 1, 7, 8, 14, 15, 21, 22, 28 |
| Junction-to-Ambient Thermal Resistance | 36.7 °C/W; RHD VQFN, 28 pins |
| Datasheet Status | request_only |
Product Overview
The LP8733 is a Texas Instruments Power_Management device classified as a dual buck converter PMIC. Its buck converters operate from a 2.8 to 5.5 V input range when the VIN_Bx and VANA pins are connected to the same supply line, while VIN_LDOx supports a 2.5 to 5.5 V recommended operating range.
The buck outputs are programmable from 0.7 to 3.36 V with range-dependent step sizes of 10 mV, 5 mV, or 20 mV. The step-down converters switch at 2 MHz and support a programmable output-voltage slew rate from 0.5 to 10 mV/us. Output current capability is 3 A in single-phase operation and 6 A in dual-phase operation.
The device integrates LDO outputs from 0.8 to 3.3 V with up to 300 mA per LDO. External component requirements include a 0.47 uH buck inductor, specified buck and LDO capacitance ranges, and 2 to 10 mohm capacitor ESR from 1 MHz to 10 MHz.
LP8733 is supplied in a 28-pin VQFN (RHD), 5.00 mm x 5.00 mm package with thermal pad and wettable flanks. Operating limits include -40 to 125 °C ambient temperature and -40 to 140 °C junction temperature.
Key Features
- Dual buck converter PMIC for Power_Management designs
- 2.8 to 5.5 V buck input voltage range
- 2 MHz step-down DC/DC converter switching frequency
- 0.7 to 3.36 V programmable buck output range
- 3 A single-phase or 6 A dual-phase buck output
- 0.5 to 10 mV/us programmable buck slew rate
- 0.8 to 3.3 V LDO output voltage range
- 300 mA maximum output current per LDO
- I2C supports 100 kHz through 3.4 MHz modes
- 28-pin 5 mm x 5 mm VQFN with thermal pad
Typical Applications
- Dual buck PMIC rails
- Single-phase 3 A power outputs
- Dual-phase 6 A power outputs
- I2C-controlled power management
- Auxiliary LDO supply rails
- 2.8 to 5.5 V input systems
- Thermal-pad VQFN assemblies
Procurement Notes
When requesting a quote for LP8733, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What input voltage range does the LP8733 support?
The LP8733 supports a 2.8 to 5.5 V input range for VIN_Bx and VANA when those pins are connected to the same supply line. The VIN_LDOx recommended operating range is 2.5 to 5.5 V.
What output current is available from the LP8733 bucks?
The buck converters provide 3 A in single-phase output operation and 6 A in dual-phase output operation. The buck output voltage range is programmable from 0.7 to 3.36 V.
What package is used for the LP8733?
The LP8733 is supplied in a 28-pin VQFN (RHD) package measuring 5.00 mm x 5.00 mm. The package includes a thermal pad and wettable flanks.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 25, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.