Specifications
| Type | Description |
|---|---|
| Part Number | MSP430FR6989 |
| Manufacturer | Texas Instruments |
| Product Type | Ultra-low-power FRAM MCU |
| Category | Microcontroller |
| Component Type | MCU |
| Package / Case | LQFP-100 14 mm x 14 mm; LQFP-80 12 mm x 12 mm |
| CPU Architecture | 16-bit RISC |
| Maximum Clock Frequency | 16 MHz |
| Supply Voltage Range | 1.8 V to 3.6 V |
| Active Mode Current | Approximately 100 uA/MHz |
| Standby Current | 0.4 uA typical |
| RTC Low-Power Current | 0.35 uA typical |
| Shutdown Current | 0.02 uA typical |
| FRAM Size | 128 KB |
| SRAM Size | 2 KB |
| FRAM Write Speed | 125 ns per word |
| FRAM Write Endurance | 10^15 write cycles |
| DMA Channels | 3 channels |
| Hardware Multiplier | 32-bit |
| Timers | Five 16-bit timers with up to 7 capture/compare registers each |
| Timer_A Configuration | 3,3 and 2,5 capture/compare registers |
| Timer_B Configuration | 7 capture/compare registers |
| ADC Resolution | 12-bit |
| ADC External Inputs | 12 external inputs for 80PN package; 16 external inputs for 100PZ package |
| Analog Comparator Channels | 16 channels |
| LCD Segment Support | 240 segments for 80PN package; 320 segments for 100PZ package |
| GPIO Count | 63 I/O for 80PN package; 83 I/O for 100PZ package |
| Capacitive Touch I/O | All P1 to P10 and PJ pins support capacitive touch |
| AES Security | 128-bit or 256-bit AES encryption and decryption coprocessor |
| Serial Interfaces | 2 eUSCI_A and 2 eUSCI_B modules |
| eUSCI_A Interface Support | UART, IrDA, SPI |
| eUSCI_B Interface Support | I2C with multiple-slave addressing, SPI |
| Bootloader Interfaces | UART and I2C |
| Clock Sources | DCO, VLO, LFXT, HFXT |
| Package Option | MSP430FR6989IPZ, LQFP-100, 14 mm x 14 mm |
| Package Option | MSP430FR6989IPN, LQFP-80, 12 mm x 12 mm |
| Datasheet Status | request_only |
Product Overview
The MSP430FR6989 is a Texas Instruments ultra-low-power FRAM MCU built around a 16-bit RISC embedded microcontroller core. The CPU supports operation up to 16 MHz across a 1.8 V to 3.6 V supply range, with low-power operating modes specified at approximately 100 uA/MHz active current, 0.4 uA typical standby current in LPM3 with VLO, 0.35 uA typical RTC current in LPM3.5, and 0.02 uA typical shutdown current in LPM4.5.
For memory and processing support, MSP430FR6989 includes 128 KB FRAM and 2 KB SRAM. The FRAM supports 125 ns per word write speed, 64 KB writes in 4 ms, and 10^15 write cycles. Integrated system peripherals include three DMA channels, a 32-bit hardware multiplier, five 16-bit timers, Timer_A and Timer_B configurations, a 12-bit ADC, and a 16-channel analog comparator.
The device is offered as MSP430FR6989IPZ in LQFP-100, 14 mm x 14 mm, and MSP430FR6989IPN in LQFP-80, 12 mm x 12 mm. Package-dependent resources include ADC external inputs, LCD segments, and GPIO count. Interface support includes eUSCI_A UART, IrDA, and SPI, eUSCI_B I2C with multiple-slave addressing and SPI, plus UART and I2C hardware bootloader access.
Key Features
- 16-bit RISC CPU with 16 MHz maximum clock
- 1.8 V to 3.6 V supply voltage range
- Approximately 100 uA/MHz active mode current
- 128 KB FRAM and 2 KB SRAM
- FRAM writes at 125 ns per word
- FRAM endurance rated at 10^15 write cycles
- Three-channel internal DMA controller
- Five 16-bit timers with capture/compare registers
- 12-bit ADC with package-dependent external inputs
- 128-bit or 256-bit AES coprocessor
Typical Applications
- Ultra-low-power sensing nodes
- Segment LCD user interfaces
- Capacitive-touch control panels
- FRAM data logging devices
- UART, I2C, and SPI equipment
- RTC-based standby monitors
- Encrypted embedded control systems
Procurement Notes
When requesting a quote for MSP430FR6989, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For MCU, processor and logic IC sourcing, package, operating voltage, temperature grade, speed or frequency grade, firmware or mask version, lifecycle status and programming requirements should be checked before approval.
FAQ
What CPU core does the MSP430FR6989 use?
The MSP430FR6989 uses a 16-bit RISC embedded microcontroller core. The CPU clock is specified up to 16 MHz, and the device operates from a 1.8 V to 3.6 V supply range.
How much memory is integrated in the MSP430FR6989?
For the MSP430FR6989, the extracted device comparison specifies 128 KB of FRAM and 2 KB of SRAM. The FRAM supports 125 ns per word writes and 10^15 write cycles.
Which serial interfaces are available on this MCU?
The MSP430FR6989 includes 2 eUSCI_A and 2 eUSCI_B modules. eUSCI_A supports UART, IrDA, and SPI, while eUSCI_B supports I2C with multiple-slave addressing and SPI.
What package options are listed for MSP430FR6989?
The device information lists MSP430FR6989IPZ in LQFP-100 at 14 mm x 14 mm and MSP430FR6989IPN in LQFP-80 at 12 mm x 12 mm.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.