Specifications
| Type | Description |
|---|---|
| Part Number | NCP1230 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | SOIC-8 case 751, SOIC-7 case 751U, PDIP-7 case 626B |
| Component Type | Power_IC |
| Control Mode | Current-mode operation with internal ramp compensation; Feature description |
| Startup Circuit | Internal high-voltage startup current source; Feature description |
| Low-load Operation | Skip-cycle capability at low peak currents; Light-load operation |
| Soft-Start Period | 2.5 ms typ; Internal soft-start; verified by design |
| Leading Edge Blanking Duration | 100 min, 200 typ, 350 max ns; Current comparator section |
| Gate Drive Peak Current | +500 mA / -800 mA; Driver output capability |
| Frequency Options | 65 kHz, 100 kHz, 133 kHz; Available oscillator versions |
| PFC VCC Function | Direct connection to VCC pin through low-impedance switch; switch opens during standby/startup and faults |
| Feedback Regulation | Optocoupler collector pulls FB pin low to regulate; Pin 2 function |
| Skip-cycle Threshold | 25% of maximum peak current setpoint; controller skips cycles at this level |
| CS/OVP Functions | Current sense, internal ramp compensation, 3.0 V latch-off level; Pin 3 function |
| VCC Input Maximum Operating Rating | Up to 18 V; Pin 6 description |
| Maximum Voltage on HV Pin | -0.3 to 500 V; Pin 8 maximum rating |
| Maximum HV Pin Current | 100 mA; Maximum rating IC2 |
| Power Supply Voltage Rating | -0.3 to 18 V; Pin 6 maximum rating |
| VCC Current Rating | 100 mA; Pin 6 maximum rating ICC2 |
| Drive Output Voltage Rating | 18 V; Pin 5 maximum rating |
| Drive Current Rating | 1.0 A; Pin 5 maximum rating |
| Current Sense Pin Voltage Rating | 10 V; Pin 3 maximum rating |
| Current Sense Pin Current Rating | 100 mA; Pin 3 maximum rating |
| Feedback Pin Voltage Rating | 10 V; Pin 2 maximum rating |
| Feedback Pin Current Rating | 100 mA; Pin 2 maximum rating |
| PFC VCC Pin Voltage Rating | 18 V; Pin 1 maximum rating |
| PFC VCC Continuous Current Rating | 35 mA max; Maximum continuous current from Pin 1 |
| Thermal Resistance Junction-to-Air | 100 °C/W; PDIP version |
| Thermal Resistance Junction-to-Air | 178 °C/W; SOIC version |
| Maximum Power Dissipation | 1.25 W; PDIP, TA=25°C |
| Maximum Power Dissipation | 0.702 W; SOIC, TA=25°C |
| Maximum Junction Temperature | 150 °C; Maximum rating |
| Storage Temperature Range | -60 to +150 °C; Maximum rating |
| ESD Protection | Human Body Model 2000 V; Pins 1-6, JEDEC JES22 method A114E |
| ESD Protection | Machine Model 200 V; Pins 1-6, JEDEC JESD22 method A115A |
| Latchup Protection | Exceeds 100 mA; JEDEC JESD78 |
| VCC Turn-On Threshold | 11.6 min, 12.6 typ, 13.6 max V; VCC rising, Vfb=2.0 V |
| Minimum Operating Voltage After Turn-On | 7.0 min, 7.7 typ, 8.4 max V; VCC UVLO turn-off threshold |
| Latch-Off Phase End VCC Level | 5.0 min, 5.6 typ, 6.2 max V; VCC decreasing, Vfb=3.5 V |
| Internal Logic Reset VCC Level | 4.0 V typ; VCC reset level |
| Internal IC Consumption No Load | 0.6 min, 1.1 typ, 1.8 max mA; No output load on Pin 6, Vfb=2.5 V |
| Internal IC Consumption with 1 nF Load | 1.3 min, 1.8 typ, 2.5 max mA; FSW=65 kHz, Vfb=2.5 V |
| Internal IC Consumption with 1 nF Load | 1.3 min, 2.2 typ, 3.0 max mA; FSW=100 kHz, Vfb=2.5 V |
| Internal IC Consumption with 1 nF Load | 1.3 min, 2.8 typ, 3.3 max mA; FSW=133 kHz, Vfb=2.5 V |
| Internal IC Consumption Latch-Off | 400 min, 680 typ, 1000 max µA; Latch-off phase |
| High-Voltage Startup Current Source | 1.8 min, 3.2 typ, 4.2 max mA; 1.0 nF load, VCCOFF-0.2 V, Vfb=2.5 V, VPIN8=30 V |
| High-Voltage Startup Current Source | 1.8 min, 4.4 typ, 5.6 max mA; VCC=0 V |
| Minimum Startup Voltage | 20 typ, 23 max V; Ic=0.5 mA, VCCOFF-0.2 V, Vfb=2.5 V |
| Startup Leakage | 10 min, 30 typ, 80 max µA; VPIN8=500 V |
| Output Voltage Rise Time | 40 ns typ; CL=1.0 nF, 10-90% of output signal |
| Output Voltage Fall Time | 15 ns typ; CL=1.0 nF, 10-90% of output signal |
| Drive Source Resistance | 6.0 min, 12.3 typ, 25 max Ω; RLoad=300 Ω, Vfb=2.5 V |
| Drive Sink Resistance | 3.0 min, 7.5 typ, 18 max Ω; 1.0 V on Pin 5, Vfb=3.5 V |
| PFC Output Impedance | 6.0 min, 11.7 typ, 23 max Ω; Rdson between Pin 1 and Pin 6 when SW1 closed, Rload on Pin 1=680 Ω |
| Current Sense Input Bias Current | 0.02 µA typ; 1.0 V input level on Pin 3 |
| Maximum Internal Current Setpoint | 1.010 min, 1.063 typ, 1.116 max V; TJ=25°C |
| Maximum Internal Current Setpoint | 0.979 min, 1.127 max V; TJ=-40°C to +125°C |
| Skip Cycle and Standby Detection Setpoint | 600 min, 750 typ, 900 max mV; Default internal setpoint |
| Standby Exit Setpoint | 1.0 min, 1.25 typ, 1.5 max V; Default internal setpoint to leave standby |
| CS-to-Gate Propagation Delay | 90 typ, 180 max ns; VGate=10 V, Pin 5 loaded by 1.0 nF |
| Thermal Shutdown Temperature | 150 min, 165 typ °C; Maximum value, verified by design |
| Thermal Shutdown Hysteresis | 25 °C typ; Verified by design |
| Oscillation Frequency | 60 min, 65 typ, 70 max kHz; 65 kHz version, Vfb=2.5 V, TJ=25°C |
| Oscillation Frequency | 55 min, 72 max kHz; 65 kHz version, Vfb=2.5 V, TJ=-40°C to +125°C |
| Oscillation Frequency | 93 min, 100 typ, 107 max kHz; 100 kHz version, TJ=25°C |
| Oscillation Frequency | 85 min, 110 max kHz; 100 kHz version, TJ=-40°C to +125°C |
| Oscillation Frequency | 123 min, 133 typ, 143 max kHz; 133 kHz version, TJ=25°C |
| Oscillation Frequency | 113 min, 146 max kHz; 133 kHz version, TJ=-40°C to +125°C |
| Internal Frequency Modulation Swing | ±6.4% typ of Fsw; Vfb=2.5 V, verified by design |
| Internal Frequency Modulation Period | 5.0 ms typ; Verified by design |
| Maximum Duty Cycle | 75 min, 80 typ, 85 max %; CS=0, Vfb=2.5 V |
| Ramp Compensation Internal Resistor | 9.0 min, 18 typ, 36 max kΩ; Verified by design |
| Ramp Compensation Sawtooth Amplitude | 2.3 Vpp typ; Internal ramp compensation |
| Optocoupler Current Source | 200 min, 235 typ, 270 max µA; Vfb=0.75 V |
| Pin 3 to Current Setpoint Division Ratio | 2.8 typ; Verified by design |
| Short-Circuit or PFC VCC Validation Timeout | 125 ms typ; Protection timeout, verified by design |
| Latch-Off Level | 2.7 min, 3.0 typ, 3.3 max V; CS/OVP Pin 3 protection threshold |
| Datasheet Status | request_only |
Product Overview
NCP1230 is a Texas Instruments fixed-frequency current-mode PWM controller for Power_Management designs using optocoupler feedback, current sensing, and high-voltage startup. The controller uses current-mode operation with internal ramp compensation and includes a high-voltage startup current source. The FB pin is regulated by an optocoupler collector pulling the pin low, while the CS/OVP pin provides current sense, ramp compensation input behavior, and a 3.0 V typical latch-off threshold.
The device is offered in SOIC-8 case 751, SOIC-7 case 751U, and PDIP-7 case 626B packages. Electrical limits include up to 18 V on VCC, -0.3 V to 500 V on the HV pin, 18 V drive output rating, and 10 V ratings on the current-sense and feedback pins. Thermal data includes 100 °C/W junction-to-air resistance for PDIP and 178 °C/W for SOIC.
Application use is centered on fixed-frequency PWM power conversion, optocoupler-regulated supplies, low-load skip-cycle operation, startup from a high-voltage input rail, and designs needing PFC VCC switching from the controller VCC pin.
Key Features
- Current-mode operation with internal ramp compensation
- Internal high-voltage startup current source
- Skip-cycle capability at low peak currents
- 2.5 ms typical internal soft-start period
- Leading-edge blanking from 100 ns to 350 ns
- +500 mA / -800 mA gate-drive peak current
- 65 kHz, 100 kHz, and 133 kHz versions
- PFC VCC switch connects directly to VCC pin
- CS/OVP pin includes 3.0 V latch-off level
- Typical 80% maximum duty cycle
Typical Applications
- Current-mode PWM power supplies
- Optocoupler feedback converters
- Low-load standby power stages
- High-voltage startup supply designs
- PFC VCC switched supplies
- Short-circuit protected power controllers
- Fixed-frequency converter control
Procurement Notes
When requesting a quote for NCP1230, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What type of controller is the NCP1230?
The NCP1230 is a Texas Instruments fixed-frequency current-mode PWM controller. It uses current-mode operation with internal ramp compensation and includes an internal high-voltage startup current source.
Which oscillator frequency versions are available for NCP1230?
The extracted datasheet facts list 65 kHz, 100 kHz, and 133 kHz oscillator versions. Frequency tables also specify min, typical, and max limits for each version at TJ=25°C and across -40°C to +125°C.
How does NCP1230 handle light-load operation?
The controller supports skip-cycle operation at low peak currents. The skip-cycle threshold is specified as 25% of the maximum peak current setpoint, and the skip-cycle and standby detection setpoint is 600 mV minimum, 750 mV typical, and 900 mV maximum.
What package options are listed for NCP1230?
The package and case information lists SOIC-8 case 751, SOIC-7 case 751U, and PDIP-7 case 626B. Thermal resistance is 100 °C/W for the PDIP version and 178 °C/W for the SOIC version.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 26, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.