Specifications
| Type | Description |
|---|---|
| Part Number | NCP1580 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | SOIC-8, D suffix, Case 751 |
| Component Type | Power_IC |
| Input Voltage Range | 4.5-13.2 V; operating supply range, VCC |
| Boost Pin Voltage | up to 26.5 V; BST pin with respect to GND |
| Oscillator Frequency | 350 kHz; internal fixed oscillator |
| Reference Voltage | 0.8 V +/-1.5%; internal reference voltage |
| Minimum Output Voltage | 0.8 V; output voltage regulation capability |
| Gate Driver Current | 1.5 A; internal floating gate drivers for N-channel MOSFETs |
| Maximum Duty Cycle | 90%; feature list |
| Control Method | Voltage mode PWM control; controller topology |
| Protection Features | Input UVLO, thermal shutdown; device protection functions |
| Specified Ambient Temperature Range | -40 to 85 °C; fully specified operating range |
| Pin Count | 8 pins; SOIC package |
| Example Application Output | 1.0 V at 20 A; 12 V input application diagram |
| BST Pin Function | Supply rail for floating top gate driver; connect boost capacitor between BST and PHASE |
| Boost Capacitor Typical Value | 0.1-1 uF; CBST between BST and PHASE |
| VCC Decoupling Capacitor | 1 uF; VCC to GND, placed near IC |
| Absolute Maximum Main Supply Voltage | -0.3 to 15 V; VCC pin |
| Absolute Maximum Bootstrap Supply Voltage | -0.3 to 30 V wrt GND; 15 V wrt PHASE; BST pin |
| Absolute Maximum PHASE Voltage | -0.7 to 30 V for t > 50 ns; -2.0 V minimum for t < 50 ns; switching node, bootstrap supply return |
| Absolute Maximum Top Gate Voltage | -0.3 to 30 V wrt GND; -0.3 to 15 V wrt PHASE; TG pin |
| Absolute Maximum Bottom Gate Voltage | -0.3 to 15 V; BG pin |
| Absolute Maximum Feedback Voltage | -0.3 to 5.5 V; FB pin |
| Absolute Maximum COMP Voltage | -0.3 to 5.5 V; COMP pin |
| Thermal Resistance Junction-to-Case | 45 °C/W; RθJC |
| Operating Junction Temperature Range | -40 to 150 °C; TJ |
| Operating Ambient Temperature Range | -40 to 85 °C; TA |
| Storage Temperature Range | -55 to 150 °C; Tstg |
| ESD Susceptibility Human Body Model | 2.0 kV; Human Body Model |
| ESD Susceptibility Charged Device Model | 200 V; Charged Device Model |
| Moisture Sensitivity Level | MSL 1; maximum ratings table |
| Electrical Characteristics Test Range | -40 °C < TA < 85 °C, -40 °C < TJ < 125 °C, 4.5 V < VCC < 13.2 V, 4.5 V < BST < 26.5 V; CTG = CBG = 1.0 nF, unless otherwise noted |
| Input Voltage Range | min 4.5 V, max 13.2 V; electrical characteristics |
| Boost Voltage Range | min 4.5 V, max 26.5 V; electrical characteristics |
| Quiescent Supply Current | typ 1.0 mA, max 1.75 mA; VFB = 1.0 V, no switching, VCC = 13.2 V |
| Boost Quiescent Current | typ 140 uA; VFB = 1.0 V, no switching |
| UVLO Threshold | min 3.85 V, typ 4.2 V; VCC rising edge |
| UVLO Hysteresis | typ 0.5 V; undervoltage lockout |
| Feedback Voltage | min 0.788 V, typ 0.800 V, max 0.812 V; TA = 0 to 70 °C, control loop in regulation |
| Feedback Voltage | min 0.784 V, max 0.816 V; TA = -40 to 85 °C, control loop in regulation |
| Oscillator Frequency | min 288 kHz, typ 350 kHz, max 412 kHz; electrical characteristics |
| Ramp Amplitude Voltage | typ 1.1 V; switching regulator |
| Minimum Duty Cycle | typ 0%; switching regulator |
| Maximum Duty Cycle | min 85%, typ 90%, max 95%; switching regulator |
| Minimum Pulse Width | min 50 ns, typ 100 ns, max 150 ns; static operating, guaranteed by design |
| Error Amplifier DC Gain | min 70 dB, typ 80 dB; guaranteed by design |
| Error Amplifier Gain-Bandwidth Product | min 8.0 MHz, typ 10 MHz; guaranteed by design |
| Error Amplifier Slew Rate | min 2.0 V/us, typ 4.0 V/us; COMP_GND = 100 pF, guaranteed by design |
| FB Bias Current | typ 0.1 uA, max 1.0 uA; VFB = 1 V, guaranteed by design |
| TG Rise Time | typ 6.0 ns, max 15 ns; Load = 1.0 nF, VCC = 8.0 V |
| TG Fall Time | typ 15 ns, max 30 ns; Load = 1.0 nF, VCC = 8.0 V |
| BG Rise Time | typ 6.0 ns, max 15 ns; Load = 1.0 nF, VCC = 8.0 V |
| BG Fall Time | typ 6.0 ns, max 15 ns; Load = 1.0 nF, VCC = 8.0 V |
| TG Sink Current | typ 1.0 A; VCC = 12 V, VTG = VBG = 2.0 V |
| TG Source Current | typ 1.5 A; VCC = 12 V, VTG = VBG = 2.0 V |
| BG Sink Current | typ 1.5 A; VCC = 12 V, VTG = VBG = 2.0 V, guaranteed by design |
| BG Source Current | typ 1.5 A; VCC = 12 V, VTG = VBG = 2.0 V |
| PHASE Falling to BG Rising Delay | typ 30 ns, max 90 ns; VCC = 12 V, PHASE < 2.0 V, BG > 2.0 V |
| BG Falling to TG Rising Delay | typ 30 ns, max 40 ns; VCC = 12 V, BG < 2.0 V, TG > 2.0 V |
| Internal Soft-Start Time | min 1.0 ms, typ 2.0 ms, max 3.0 ms; internal soft-start |
| Thermal Shutdown Trip Point | typ 160 °C; overtemperature trip point, guaranteed by design |
| Shutdown Behavior | Switching stops, internal soft-start discharges, all gate pins go low; input supply reaches UVLO threshold |
| UVLO Startup Threshold | 4.2 V; IC starts when VCC reaches threshold |
| UVLO Shutdown Threshold | 3.7 V; IC shuts down when VCC drops below threshold |
| Thermal Shutdown State | Latched, requires power cycle to reset; overtemperature condition detected |
| Datasheet Status | request_only |
Product Overview
The NCP1580 is a Texas Instruments synchronous buck controller for Power_Management designs using external N-channel MOSFETs. It uses voltage mode PWM control with an internal fixed oscillator specified at 350 kHz typical and a 0.8 V internal reference. The device supports regulation down to 0.8 V and includes an example 12 V input application producing 1.0 V at 20 A.
Supply operation is specified across 4.5-13.2 V on VCC, while the bootstrap operating range is specified up to 26.5 V. The BST pin supplies the floating top gate driver and is used with a 0.1-1 uF boost capacitor between BST and PHASE. A 1 uF VCC decoupling capacitor is specified from VCC to GND near the IC.
The controller is offered in an 8-pin SOIC package, D suffix, Case 751. Protection and operating limits include input UVLO, thermal shutdown, an operating ambient range of -40 to 85 °C, and an operating junction range of -40 to 150 °C. When UVLO is reached, switching stops, soft-start discharges, and all gate pins go low.
Key Features
- Synchronous buck controller for external N-channel MOSFETs
- 4.5-13.2 V VCC operating supply range
- 350 kHz fixed internal oscillator
- 0.8 V reference with +/-1.5% accuracy
- Voltage mode PWM control architecture
- 1.5 A floating gate driver current
- Maximum duty cycle specified at 90% typical
- Input UVLO and thermal shutdown protection
- Internal soft-start time of 2.0 ms typical
- SOIC-8 package with D suffix, Case 751
Typical Applications
- 12 V input buck converters
- 1.0 V, 20 A output rails
- Synchronous step-down power stages
- Low-voltage regulated supply rails
- N-channel MOSFET gate-drive designs
- Power_Management controller applications
Procurement Notes
When requesting a quote for NCP1580, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What supply voltage range does the NCP1580 support?
The NCP1580 operating VCC supply range is specified as 4.5-13.2 V. Electrical characteristics also list an input voltage range of minimum 4.5 V and maximum 13.2 V.
What switching frequency is specified for the NCP1580?
The controller uses an internal fixed oscillator with a typical frequency of 350 kHz. Electrical characteristics specify the oscillator frequency as 288 kHz minimum, 350 kHz typical, and 412 kHz maximum.
What package is used for the NCP1580?
The NCP1580 is listed in an SOIC-8 package with D suffix, Case 751. The extracted package facts identify an 8-pin SOIC package.
What happens when the NCP1580 reaches UVLO shutdown?
When the input supply reaches the UVLO threshold, switching stops, the internal soft-start discharges, and all gate pins go low. The IC starts when VCC reaches 4.2 V and shuts down when VCC drops below 3.7 V.
How is the bootstrap pin used on the NCP1580?
The BST pin is the supply rail for the floating top gate driver. The datasheet facts specify connecting a boost capacitor between BST and PHASE, with a typical CBST value of 0.1-1 uF.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 26, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.