Specifications
| Type | Description |
|---|---|
| Part Number | NCP711 |
| Manufacturer | ON Semiconductor |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | TSOP-5 3.00x1.50x0.95 mm, 0.95P; WDFN6 2x2 |
| Component Type | Power_IC |
| Operating Input Voltage Range | 2.7 to 18 V; recommended operating range |
| Absolute Maximum VIN Voltage | -0.3 to 22 V; maximum ratings |
| Output Voltage Range | 1.2 to 17 V; available fixed and adjustable versions |
| Rated Output Current | 100 mA; continuous LDO output current capability |
| Peak Output Current | 140 mA; capable of sourcing peak output current |
| Output Voltage Accuracy | ±1% typ/listed feature; -1% min to +1% max; TJ=-40°C to +85°C |
| Output Voltage Accuracy | -1% min to +2% max; TJ=-40°C to +125°C |
| ADJ Reference Voltage | 1.2 V typ; ADJ version only |
| ADJ Input Current | -0.1 μA min, 0.01 μA typ, 0.1 μA max; VADJ=1.2 V |
| Line Regulation | 0.2% VOUT max; VIN=VOUT-NOM+1 V to 18 V and VIN>=2.7 V |
| Load Regulation | 0.4% VOUT max; IOUT=0.1 mA to 100 mA |
| Quiescent Current Version A | 1.3 μA typ, 2.5 μA max; VIN=VOUT-NOM+1 V to 18 V, IOUT=0 mA, no PG |
| Quiescent Current Version B | 1.8 μA typ, 3.0 μA max; VIN=VOUT-NOM+1 V to 18 V, IOUT=0 mA, with PG |
| Ground Current | 325 μA typ, 450 μA max; IOUT=100 mA |
| Shutdown Current | 0.35 μA typ, 1.5 μA max; VEN=0 V, IOUT=0 mA, VIN=18 V; includes EN pull-up current |
| Output Current Limit | 140 mA min, 250 mA typ, 450 mA max; VOUT=VOUT-NOM-100 mV |
| Short Circuit Current | 140 mA min, 250 mA typ, 450 mA max; VOUT=0 V |
| Dropout Voltage | 215 mV typ, 355 mV max; IOUT=100 mA; output falls 100 mV below nominal; valid for VOUT-NOM>=2.5 V |
| PSRR | 80 dB typ; VIN=VOUT-NOM+2 V, IOUT=10 mA, f=10 Hz |
| PSRR | 70 dB typ; VIN=VOUT-NOM+2 V, IOUT=10 mA, f=10 kHz |
| PSRR | 42 dB typ; VIN=VOUT-NOM+2 V, IOUT=10 mA, f=100 kHz |
| PSRR | 48 dB typ; VIN=VOUT-NOM+2 V, IOUT=10 mA, f=1 MHz |
| Output Noise | 240 μVRMS typ; f=10 Hz to 100 kHz, VOUT-NOM=5.0 V |
| EN Threshold | 0.7 V min, 0.9 V typ, 1.05 V max; VEN rising |
| EN Hysteresis | 0.01 V min, 0.1 V typ, 0.2 V max; VEN falling |
| EN Internal Pull-up Current | 0.01 μA min, 0.3 μA typ, 1 μA max; VEN=1 V, VIN=5.5 V |
| EN Input Leakage Current | -1 μA min, 0.05 μA typ, 1 μA max; VEN=18 V, VIN=18 V |
| Startup Time | 100 μs min, 250 μs typ, 500 μs max; VOUT-NOM<=3.3 V; EN assertion to VOUT=95% of nominal |
| Startup Time | 300 μs min, 600 μs typ, 1000 μs max; VOUT-NOM>3.3 V; EN assertion to VOUT=95% of nominal |
| Internal UVLO Threshold | 1.6 V min, 1.95 V typ, 2.6 V max; ramp VIN up until output turns on |
| Internal UVLO Hysteresis | 0.05 V min, 0.2 V typ, 0.3 V max; ramp VIN down until output turns off |
| PG Threshold | 90% min, 93% typ, 96% max; Version B only, VOUT falling, percentage of nominal output voltage |
| PG Hysteresis | 0.1% min, 2% typ, 4% max; Version B only, VOUT rising, percentage of nominal output voltage |
| PG Deglitch Time | 75 μs min, 160 μs typ, 270 μs max; Version B only |
| PG Delay Time | 120 μs min, 320 μs typ, 600 μs max; Version B only |
| PG Output Low Level Voltage | 0.2 V typ, 0.4 V max; Version B only, IPG=1 mA |
| PG Output Leakage Current | 0.01 μA typ, 1 μA max; Version B only, VPG=18 V |
| Thermal Shutdown Temperature | 165°C typ; temperature rising from TJ=+25°C |
| Thermal Shutdown Hysteresis | 20°C typ; temperature falling from TSD |
| Maximum Junction Temperature | 150°C; maximum ratings |
| Storage Temperature | -55 to 150°C; maximum ratings |
| ESD HBM Capability | 2000 V; ANSI/ESDA/JEDEC JS-001, EIA/JESD22-A114 |
| ESD CDM Capability | 1000 V; ANSI/ESDA/JEDEC JS-002, EIA/JESD22-C101 |
| Thermal Resistance Junction-to-Air | 67°C/W WDFN6 2x2; 178°C/W TSOP-5; JEDEC 1S2P board, 1 oz Cu, 650 mm2 Cu area, no airflow |
| Thermal Resistance Junction-to-Case Top | 89°C/W WDFN6 2x2; 93°C/W TSOP-5; JEDEC 1S2P board |
| Thermal Resistance Junction-to-Case Bottom | 11°C/W WDFN6 2x2; N/A TSOP-5; JEDEC 1S2P board |
| Input Capacitor | 1.0 μF effective capacitance; typical application and electrical characteristics test condition |
| Output Capacitor | 1.0 μF effective capacitance; stable with small ceramic capacitors; electrical characteristics test condition |
| Enable Pin Behavior | High enabled, low disabled; enabled if tied to IN or left unconnected |
| Power Good Output Function | High level for power OK, low level for fail; Version B PG pin |
| Datasheet Status | request_only |
Product Overview
The NCP711 is an ON Semiconductor Power_Management IC described as a 100 mA CMOS LDO regulator. It operates from a recommended 2.7 to 18 V input range, with an absolute maximum VIN rating of -0.3 to 22 V. Output options cover 1.2 to 17 V across fixed and adjustable versions, with an ADJ reference of 1.2 V typical for adjustable designs.
The device provides 100 mA continuous output current and can source 140 mA peak output current. Electrical behavior includes 0.2% VOUT maximum line regulation, 0.4% VOUT maximum load regulation, 215 mV typical dropout at 100 mA for VOUT-NOM >= 2.5 V, and PSRR values specified from 10 Hz to 1 MHz. Version A lists 1.3 μA typical quiescent current without PG, while Version B lists 1.8 μA typical quiescent current with PG.
Assembly options include TSOP-5 3.00x1.50x0.95 mm, 0.95P and WDFN6 2x2 packages. The regulator is specified with 1.0 μF effective input and output capacitors, supports high-enabled EN control, and Version B adds a power-good output for monitored rails.
Key Features
- 2.7 to 18 V recommended input voltage range
- 1.2 to 17 V fixed and adjustable outputs
- 100 mA continuous output current capability
- 140 mA peak output current capability
- 215 mV typical dropout at 100 mA
- Version A 1.3 μA typical quiescent current
- Version B power-good output with delay and deglitch
- High-enabled EN pin with internal pull-up current
- Stable operation with 1.0 μF ceramic output capacitor
- Thermal shutdown at 165°C typical
Typical Applications
- Low-current regulated power rails
- Enable-controlled supply rails
- Adjustable output voltage rails
- Power-good monitored supply rails
- Ceramic-capacitor LDO designs
- Wide-input local regulation
Procurement Notes
When requesting a quote for NCP711, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What input voltage range does the NCP711 support?
The NCP711 recommended operating input voltage range is 2.7 to 18 V. Its absolute maximum VIN rating is -0.3 to 22 V, which is listed separately under maximum ratings.
What output current is specified for the NCP711?
The NCP711 is specified as a 100 mA CMOS LDO regulator with 100 mA continuous output current capability. It is also listed as capable of sourcing 140 mA peak output current.
Which packages are listed for the NCP711?
The extracted package information lists TSOP-5 3.00x1.50x0.95 mm, 0.95P and WDFN6 2x2 package options for the NCP711.
How does the NCP711 enable pin behave?
The enable pin is high enabled and low disabled. The extracted pin description states that the device is enabled if EN is tied to IN or left unconnected.
What does Version B add to the NCP711?
Version B includes a PG power-good pin. The power-good output function is high level for power OK and low level for fail, with specified threshold, hysteresis, deglitch time, delay time, low-level voltage, and leakage current.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 25, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.