Specifications
| Type | Description |
|---|---|
| Part Number | OPA2182 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | D (SOIC, 8) 4.90 mm x 3.90 mm; DGK (VSSOP, 8) 3.00 mm x 3.00 mm |
| Number of channels | 2; condition: OPA2182 dual amplifier; source page: 4 |
| Input architecture | MUX-friendly inputs; condition: Device feature description; source page: 1 |
| Output swing type | Rail-to-rail output; condition: Device feature description; source page: 1 |
| Input common-mode range feature | Input includes negative rail; condition: Device feature description; source page: 1 |
| Gain bandwidth product | 5 MHz; condition: Typical dynamic performance; source page: 1 |
| Slew rate | 10 V/µs; condition: Typical dynamic performance; source page: 1 |
| Settling time | 1.7 µs; condition: 10-V step, 0.01% settling; source page: 1 |
| Quiescent current | 0.85 mA; condition: Device feature list; source page: 1 |
| Input offset voltage | ±0.45 µV typ, ±4 µV max; condition: TA=25°C, VCM=VOUT=VS/2, RLOAD=10 kΩ to VS/2; source page: 8 |
| Input offset voltage | ±4 µV max; condition: TA=0°C to 85°C; source page: 8 |
| Input offset voltage | ±4 µV max; condition: TA=-40°C to +125°C; source page: 8 |
| Input offset voltage drift | ±0.003 µV/°C typ, ±0.012 µV/°C max; condition: OPA2182, TA=0°C to 85°C; source page: 8 |
| Input offset voltage drift | ±0.003 µV/°C typ, ±0.012 µV/°C max; condition: OPA2182, TA=-40°C to +125°C; source page: 8 |
| Power-supply rejection ratio | ±0.005 µV/V typ, ±0.05 µV/V max; condition: OPA2182, TA=-40°C to +125°C; source page: 8 |
| Input bias current | ±50 pA typ, ±350 pA max; condition: ZIN=100 kΩ || 500 pF, TA=25°C; source page: 8 |
| Input bias current | ±1 nA max; condition: ZIN=100 kΩ || 500 pF, TA=0°C to 85°C; source page: 8 |
| Input bias current | ±7 nA max; condition: ZIN=100 kΩ || 500 pF, TA=-40°C to +125°C; source page: 8 |
| Input offset current | ±140 pA typ, ±700 pA max; condition: ZIN=100 kΩ || 500 pF, TA=25°C; source page: 8 |
| Input offset current | ±2 nA max; condition: ZIN=100 kΩ || 500 pF, TA=0°C to 85°C; source page: 8 |
| Input offset current | ±3 nA max; condition: ZIN=100 kΩ || 500 pF, TA=-40°C to +125°C; source page: 8 |
| Input voltage noise | 18 nVRMS; condition: f=0.1 Hz to 10 Hz; source page: 8 |
| Input voltage noise | 0.119 µVPP; condition: f=0.1 Hz to 10 Hz; source page: 8 |
| Input voltage noise density | 5.7 nV/√Hz; condition: f=10 Hz; source page: 8 |
| Input voltage noise density | 5.7 nV/√Hz; condition: f=100 Hz; source page: 8 |
| Input voltage noise density | 5.7 nV/√Hz; condition: f=1 kHz; source page: 8 |
| Input voltage noise density | 5.7 nV/√Hz; condition: f=10 kHz; source page: 8 |
| Input current noise density | 165 fA/√Hz; condition: f=1 kHz; source page: 8 |
| Recommended single supply voltage | 4.5 V min, 36 V max; condition: Recommended operating conditions; source page: 6 |
| Recommended dual supply voltage | ±2.25 V min, ±18 V max; condition: Recommended operating conditions; source page: 6 |
| Recommended operating temperature | -40°C to +125°C; condition: Operating free-air temperature range; source page: 6 |
| Absolute maximum single supply voltage | 40 V max; condition: VS=(V+); source page: 6 |
| Absolute maximum dual supply voltage | ±20 V max; condition: VS=(V+) - (V-); source page: 6 |
| Absolute maximum common-mode input voltage | (V-) - 0.5 V min, (V+) + 0.5 V max; condition: Signal input voltage, common-mode; source page: 6 |
| Absolute maximum differential input voltage | (V+) - (V-) + 0.2 V max; condition: Signal input voltage, differential; source page: 6 |
| Absolute maximum input current | ±10 mA; condition: Signal input current; source page: 6 |
| Output short circuit duration | Continuous; condition: Short-circuit to ground, one amplifier per package; source page: 6 |
| Absolute maximum operating temperature | -55°C to +150°C; condition: Absolute maximum ratings, TA; source page: 6 |
| Maximum junction temperature | 150°C; condition: Absolute maximum ratings, TJ; source page: 6 |
| Storage temperature | -65°C to +150°C; condition: Absolute maximum ratings, Tstg; source page: 6 |
| ESD rating HBM | ±4000 V; condition: Human-body model, ANSI/ESDA/JEDEC JS-001; source page: 6 |
| ESD rating CDM | ±1000 V; condition: Charged-device model, ANSI/ESDA/JEDEC JS-002; source page: 6 |
| Thermal resistance junction-to-ambient | 108.1°C/W; condition: OPA2182 D SOIC-8 package; source page: 7 |
| Thermal resistance junction-to-ambient | 150.2°C/W; condition: OPA2182 DGK VSSOP-8 package; source page: 7 |
| Thermal resistance junction-to-case top | 45.8°C/W; condition: OPA2182 D SOIC-8 package; source page: 7 |
| Thermal resistance junction-to-case top | 43.9°C/W; condition: OPA2182 DGK VSSOP-8 package; source page: 7 |
| Thermal resistance junction-to-board | 51.3°C/W; condition: OPA2182 D SOIC-8 package; source page: 7 |
| Thermal resistance junction-to-board | 71.4°C/W; condition: OPA2182 DGK VSSOP-8 package; source page: 7 |
| Junction-to-top characterization parameter | 7.2°C/W; condition: OPA2182 D SOIC-8 package; source page: 7 |
| Junction-to-top characterization parameter | 2.9°C/W; condition: OPA2182 DGK VSSOP-8 package; source page: 7 |
| Junction-to-board characterization parameter | 50.6°C/W; condition: OPA2182 D SOIC-8 package; source page: 7 |
| Junction-to-board characterization parameter | 70.0°C/W; condition: OPA2182 DGK VSSOP-8 package; source page: 7 |
| Package option | D (SOIC, 8), 4.90 mm x 3.90 mm body; condition: OPA2182 package information; source page: 1 |
| Package option | DGK (VSSOP, 8), 3.00 mm x 3.00 mm body; condition: OPA2182 package information; source page: 1 |
| Pin 1 | OUT A; condition: OPA2182 D/DGK 8-pin package; source page: 4 |
| Pin 2 | -IN A; condition: OPA2182 D/DGK 8-pin package; source page: 4 |
| Pin 3 | +IN A; condition: OPA2182 D/DGK 8-pin package; source page: 4 |
| Pin 4 | V-; condition: OPA2182 D/DGK 8-pin package; source page: 4 |
| Pin 5 | +IN B; condition: OPA2182 D/DGK 8-pin package; source page: 4 |
| Pin 6 | -IN B; condition: OPA2182 D/DGK 8-pin package; source page: 4 |
| Pin 7 | OUT B; condition: OPA2182 D/DGK 8-pin package; source page: 4 |
| Pin 8 | V+; condition: OPA2182 D/DGK 8-pin package; source page: 4 |
| Datasheet Status | request_only |
Product Overview
The OPA2182 is a Texas Instruments dual zero-drift precision op amp in the Signal_Chain category. It provides two amplifier channels with MUX-friendly inputs, rail-to-rail output behavior, and an input common-mode range feature that includes the negative rail.
Dynamic performance includes a 5 MHz gain bandwidth product, 10 V/µs slew rate, and 1.7 µs settling time for a 10-V step to 0.01%. Precision parameters include ±0.45 µV typical and ±4 µV maximum input offset voltage at 25°C, plus ±0.003 µV/°C typical and ±0.012 µV/°C maximum offset drift across rated temperature ranges.
The device operates from 4.5 V to 36 V single supply or ±2.25 V to ±18 V dual supplies across -40°C to +125°C. Available package options are D SOIC-8 with a 4.90 mm x 3.90 mm body and DGK VSSOP-8 with a 3.00 mm x 3.00 mm body. The 8-pin pinout provides OUT A, amplifier A inputs, supply pins, amplifier B inputs, and OUT B.
Key Features
- Dual zero-drift precision op amp with two channels
- MUX-friendly inputs for multiplexed signal paths
- Rail-to-rail output swing feature
- Input common-mode range includes negative rail
- 5 MHz gain bandwidth product
- 10 V/µs typical slew rate
- 1.7 µs settling for 10-V step to 0.01%
- 0.85 mA quiescent current
- ±4 µV maximum input offset voltage
- SOIC-8 and VSSOP-8 package options
Typical Applications
- Dual precision amplification
- Multiplexed signal paths
- Rail-to-rail output circuits
- Negative-rail input sensing
- Single-supply signal conditioning
- Dual-supply signal conditioning
- Low-offset analog front ends
Procurement Notes
When requesting a quote for OPA2182, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
How many amplifier channels does the OPA2182 include?
The OPA2182 is the dual amplifier version and includes 2 channels. The D and DGK 8-pin package pinout provides separate output and input pins for amplifier A and amplifier B.
What supply ranges are recommended for OPA2182 operation?
The recommended single-supply range is 4.5 V to 36 V. For dual-supply operation, the recommended range is ±2.25 V to ±18 V. The recommended operating free-air temperature range is -40°C to +125°C.
Which package options are listed for the OPA2182?
The listed package options are D SOIC-8 with a 4.90 mm x 3.90 mm body and DGK VSSOP-8 with a 3.00 mm x 3.00 mm body. Both use the OPA2182 8-pin package pinout.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.