Specifications
| Type | Description |
|---|---|
| Part Number | OPA2365 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Channel Count | 2 channels |
| Package | D (SOIC, 8-pin) |
| Input Type | CMOS |
| Gain Bandwidth Product | 50 MHz |
| Minimum Stable Gain | 1 V/V |
| Slew Rate | 25 V/us |
| Voltage Noise Density | 4.5 nV/sqrt(Hz) |
| THD+N | 0.0004% |
| Input Offset Voltage | Typ 100 uV, Max 200 uV |
| Input Offset Voltage Drift | Typ 1 uV/°C |
| Power-Supply Rejection Ratio Offset Error | Typ 10 uV/V |
| DC Channel Separation | Typ 0.2 uV/V |
| Input Bias Current | Typ ±0.2 pA, Max ±10 pA |
| Input Offset Current | Typ ±0.2 pA, Max ±10 pA |
| Input Voltage Noise | 5 uVPP |
| Input Current Noise Density | 4 fA/sqrt(Hz) |
| Common-Mode Voltage Range | (V-) - 0.1 V to (V+) + 0.1 V |
| Common-Mode Rejection Ratio | Min 100 dB, Typ 120 dB |
| Differential Input Capacitance | 6 pF |
| Common-Mode Input Capacitance | 2 pF |
| Open-Loop Voltage Gain | Min 100 dB, Typ 120 dB |
| Open-Loop Voltage Gain | Min 100 dB, Typ 120 dB |
| Open-Loop Voltage Gain | Min 94 dB |
| Settling Time to 0.1% | 200 ns |
| Settling Time to 0.01% | 300 ns |
| Overload Recovery Time | <0.1 us |
| Voltage Output Swing From Rail | Typ 10 mV, Max 20 mV |
| Short-Circuit Current | ±65 mA |
| Open-Loop Output Impedance | 30 ohm |
| Specified Supply Voltage Range | Min 2.2 V, Max 5.5 V |
| Quiescent Current Per Amplifier | Typ 4.6 mA, Max 5 mA |
| Quiescent Current Per Amplifier Over Temperature | Max 5 mA |
| Specified Temperature Range | -40°C to +125°C |
| Operating Temperature Range | -40°C to +150°C |
| Absolute Maximum Supply Voltage | 5.5 V |
| Absolute Maximum Signal Input Terminal Voltage | -0.5 V to 0.5 V |
| Absolute Maximum Signal Input Terminal Current | -10 mA to +10 mA |
| Output Short-Circuit Rating | Continuous |
| Operating Temperature Absolute Maximum | -40°C to +150°C |
| Junction Temperature Absolute Maximum | 150°C |
| Storage Temperature Range | -65°C to +150°C |
| HBM ESD Rating | ±4000 V |
| CDM ESD Rating | ±1000 V |
| Machine Model ESD Rating | ±400 V |
| Junction-to-Ambient Thermal Resistance | 115.5°C/W |
| Junction-to-Case Top Thermal Resistance | 60.1°C/W |
| Junction-to-Board Thermal Resistance | 56.9°C/W |
| Junction-to-Top Characterization Parameter | 9.5°C/W |
| Junction-to-Board Characterization Parameter | 56.3°C/W |
| Junction-to-Case Bottom Thermal Resistance | N/A |
| Pin 1 Function | VOUT A |
| Pin 2 Function | -IN A |
| Pin 3 Function | +IN A |
| Pin 4 Function | V- |
| Pin 5 Function | +IN B |
| Pin 6 Function | -IN B |
| Pin 7 Function | VOUT B |
| Pin 8 Function | V+ |
| Datasheet Status | request_only |
Product Overview
Electrical performance is centered on a 50 MHz gain bandwidth product at VS=5 V, 25 V/us slew rate at VS=5 V and G=1, and 200 ns settling to 0.1% for a 4 V step at G=+1. Noise and precision parameters include 4.5 nV/sqrt(Hz) voltage noise density at 100 kHz, 5 uVPP input voltage noise from 0.1 Hz to 10 Hz, and 100 uV typical input offset voltage at 25°C under the specified load and common-mode conditions.
The SOIC-8 pinout provides separate channel A and channel B inputs and outputs, with V- on pin 4 and V+ on pin 8. The device is specified for 2.2 V to 5.5 V operation, with absolute maximum supply voltage of 5.5 V. Thermal data for the OPA2365 D package includes 115.5°C/W junction-to-ambient resistance. These parameters support compact dual-channel signal conditioning, rail-to-rail buffering, and low-bias-current analog input stages.
Key Features
- Dual-channel rail-to-rail operational amplifier architecture
- CMOS input type for both amplifier channels
- 50 MHz gain bandwidth product at VS=5 V
- 25 V/us slew rate at VS=5 V, G=1
- Unity-gain stable with 1 V/V minimum stable gain
- 4.5 nV/sqrt(Hz) voltage noise density at 100 kHz
- 100 uV typical input offset voltage at TA=25°C
- 2.2 V to 5.5 V specified supply range
- SOIC-8 D package with defined dual-channel pinout
- -40°C to +125°C specified temperature range
Typical Applications
- Dual-channel signal conditioning
- Rail-to-rail signal buffering
- CMOS-input analog front ends
- Low-noise sensor input stages
- Unity-gain buffer circuits
- 5 V analog signal paths
- SOIC-8 amplifier replacements
Procurement Notes
When requesting a quote for OPA2365, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
How many amplifier channels does the OPA2365 include?
The OPA2365 is the dual version in the OPAx365 family and includes 2 amplifier channels. The SOIC-8 pinout provides separate channel A and channel B inputs and outputs.
What package is specified for this OPA2365 listing?
This OPA2365 listing uses the D package, identified as SOIC with 8 pins. The extracted pin functions are based on the OPA2365 D package SOIC-8 top-view pinout.
What supply voltage range is specified for OPA2365 operation?
The specified supply voltage range is 2.2 V minimum to 5.5 V maximum. The absolute maximum supply voltage is also listed as 5.5 V over the stated free-air temperature conditions.
What are the main speed parameters of the OPA2365?
At VS=5 V, the OPA2365 has a 50 MHz gain bandwidth product and 25 V/us slew rate at G=1. Settling time is listed as 200 ns to 0.1% and 300 ns to 0.01% for a 4 V step at G=+1.
What input and noise characteristics are listed for the OPA2365?
The device uses CMOS inputs. Listed noise parameters include 4.5 nV/sqrt(Hz) voltage noise density at 100 kHz, 5 uVPP input voltage noise from 0.1 Hz to 10 Hz, and 4 fA/sqrt(Hz) input current noise density at 10 kHz.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.