Specifications
| Type | Description |
|---|---|
| Part Number | PCA9546A |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | SOIC (D) 16: 9.90 mm x 3.91 mm; TVSOP (DGV) 16: 3.60 mm x 4.40 mm; SOIC (DW) 16: 10.3 mm x 7.50 mm; TSSOP (PW) 16: 5.00 mm x 4.40 mm; VQFN (RGV) 16: 4.00 mm x 4.00 mm; VQFN (RGY) 16: 4.50 mm x 3.50 mm |
| Function | Quad bidirectional translating switch controlled via I2C bus; SCL/SDA upstream pair fans out to four downstream channel pairs |
| Channel Count | 4 downstream channels; SC0/SD0 through SC3/SD3 |
| Channel Selection | Any individual channel or combination of channels selectable; determined by programmable control register contents |
| Interface Compatibility | I2C bus and SMBus compatible for device control and bus switching |
| Address Pins | 3 address pins; allows up to eight PCA9546A devices on the I2C bus |
| Reset Input | Active-low RESET input; resets I2C state machine and deselects all channels |
| Power-Up State | All switch channels deselected at power-up or after internal power-on reset |
| Supported Bus Voltage Translation | 1.8 V, 2.5 V, 3.3 V, and 5 V buses; external pull-up resistors set desired voltage level for each channel |
| Input Tolerance | 5.5 V tolerant inputs; all I/O pins are 5.5 V tolerant |
| Clock Frequency | 0 to 400 kHz for I2C/SMBus operation |
| Latch-Up Performance | Exceeds 100 mA per JESD 78 |
| ESD Protection - HBM | ±2000 V, human-body model, ANSI/ESDA/JEDEC JS-001 / JESD 22 A114-A |
| ESD Protection - CDM | ±1000 V, charged-device model, JEDEC JESD22-C101 |
| Recommended Supply Voltage | 2.3 to 5.5 V operating conditions |
| Recommended Operating Free-Air Temperature | -40 to 85 °C operating conditions |
| Absolute Maximum Supply Voltage | -0.5 to 7 V over operating free-air temperature range |
| Absolute Maximum Input Voltage | -0.5 to 7 V; input negative-voltage and output voltage ratings may be exceeded if current ratings are observed |
| Absolute Maximum Input Current | ±20 mA over operating free-air temperature range |
| Absolute Maximum Output Current | ±25 mA over operating free-air temperature range |
| Absolute Maximum Continuous VCC Current | ±100 mA continuous current through VCC |
| Absolute Maximum Continuous GND Current | ±100 mA continuous current through GND |
| Total Power Dissipation | 400 mW absolute maximum rating |
| Storage Temperature | -65 to 150 °C absolute maximum rating |
| High-Level Input Voltage - SCL/SDA | Minimum 0.7 × VCC, maximum 6 V under recommended operating conditions |
| High-Level Input Voltage - A2-A0 and RESET | Minimum 0.7 × VCC, maximum VCC + 0.5 V under recommended operating conditions |
| Low-Level Input Voltage - SCL/SDA | Minimum -0.5 V, maximum 0.3 × VCC under recommended operating conditions |
| Low-Level Input Voltage - A2-A0 and RESET | Minimum -0.5 V, maximum 0.3 × VCC under recommended operating conditions |
| Power-On Reset Voltage Rising | Typical 1.2 V, maximum 1.5 V; VPORR, VCC rising, no load, VI = VCC or GND |
| Power-On Reset Voltage Falling | Typical 0.8 V, maximum 1 V; VPORF, VCC falling, no load, VI = VCC or GND |
| Switch Output Voltage | Typical 3.6 V at VCC=5 V; minimum 2.6 V maximum 4.5 V at VCC=4.5 to 5.5 V; typical 1.9 V at VCC=3.3 V; minimum 1.6 V maximum 2.8 V at VCC=3 to 3.6 V; typical 1.5 V at VCC=2.5 V; minimum 1.1 V maximum 2 V at VCC=2.3 to 2.7 V; Vpass, VSWin = VCC, ISWout = -100 µA |
| SCL/SDA Low-Level Output Current | Minimum 3 mA, maximum 7 mA at VOL=0.4 V; minimum 6 mA, maximum 10 mA at VOL=0.6 V; IOL, VCC=2.3 to 5.5 V |
| Input Leakage Current | ±1 µA; SCL, SDA, SC3-SC0, SD3-SD0, A2-A0, RESET; VI = VCC or GND; VCC=2.3 to 5.5 V |
| Operating Supply Current | Typical 3 µA, maximum 12 µA at VCC=5.5 V; typical 3 µA, maximum 11 µA at VCC=3.6 V; typical 3 µA, maximum 10 µA at VCC=2.7 V; operating mode, fSCL=100 kHz, VI=VCC or GND, IO=0 |
| Standby Supply Current - Low Inputs | Typical 1.6 µA, maximum 2 µA at VCC=5.5 V; typical 1 µA, maximum 1.3 µA at VCC=3.6 V; typical 0.7 µA, maximum 1.1 µA at VCC=2.7 V; VI=GND, IO=0 |
| Standby Supply Current - High Inputs | Typical 1.6 µA, maximum 2 µA at VCC=5.5 V; typical 1 µA, maximum 1.3 µA at VCC=3.6 V; typical 0.7 µA, maximum 1.1 µA at VCC=2.7 V; VI=VCC, IO=0 |
| Supply Current Change - SCL/SDA | Typical 8 µA, maximum 15 µA; SCL or SDA input at 0.6 V or VCC - 0.6 V, other inputs at VCC or GND, VCC=2.3 to 5.5 V |
| Input Capacitance - Address Pins | Typical 4.5 pF, maximum 6 pF; A2-A0, VI=VCC or GND, VCC=2.3 to 5.5 V |
| Input Capacitance - RESET | Typical 4.5 pF, maximum 5.5 pF; VI=VCC or GND, VCC=2.3 to 5.5 V |
| Off-State I/O Capacitance - SCL/SDA | Typical 15 pF, maximum 19 pF; switch OFF, VI=VCC or GND, VCC=2.3 to 5.5 V |
| Off-State I/O Capacitance - Downstream Channels | Typical 6 pF, maximum 8 pF; SC3-SC0 and SD3-SD0, switch OFF, VI=VCC or GND, VCC=2.3 to 5.5 V |
| Switch On-State Resistance | Minimum 4 Ω, typical 10 Ω, maximum 16 Ω at VCC=4.5 to 5.5 V; minimum 5 Ω, typical 13 Ω, maximum 20 Ω at VCC=3 to 3.6 V; minimum 7 Ω, typical 16 Ω, maximum 45 Ω at VCC=2.3 to 2.7 V; RON; VO=0.4 V; IO=15 mA for VCC=4.5 to 5.5 V and 3 to 3.6 V; IO=10 mA for VCC=2.3 to 2.7 V |
| Standard-Mode I2C Clock Frequency | 0 to 100 kHz for I2C bus standard mode timing |
| Standard-Mode I2C Clock High Time | Minimum 4 µs for I2C bus standard mode timing |
| Standard-Mode I2C Clock Low Time | Minimum 4.7 µs for I2C bus standard mode timing |
| Standard-Mode I2C Spike Time | Maximum 50 ns for I2C bus standard mode timing |
| Standard-Mode I2C Serial Data Setup Time | Minimum 250 ns for I2C bus standard mode timing |
| Standard-Mode I2C Serial Data Hold Time | Minimum 0 ns for I2C bus standard mode timing |
| Standard-Mode I2C Input Rise Time | Maximum 1000 ns for I2C bus standard mode timing |
| Standard-Mode I2C Input Fall Time | Maximum 300 ns for I2C bus standard mode timing |
| Standard-Mode I2C Output Fall Time | Maximum 300 ns; 10-pF to 400-pF bus, I2C bus standard mode timing |
| Thermal Resistance - Junction to Ambient | DGV 120 °C/W; DW 57 °C/W; PW 122.3 °C/W; RGV 63.2 °C/W; RGY 50 °C/W; D 92.3 °C/W; RθJA, 16-pin packages |
| Datasheet Status | request_only |
Product Overview
The PCA9546A is a Texas Instruments quad bidirectional translating switch controlled through the I2C bus. One upstream SCL/SDA pair fans out to four downstream channel pairs, SC0/SD0 through SC3/SD3. Any individual channel or combination of channels can be selected by the programmable control register, and three address pins allow up to eight PCA9546A devices on the same I2C bus.
The device is I2C bus and SMBus compatible and operates across 0 to 400 kHz, including standard-mode timing from 0 to 100 kHz. External pull-up resistors set the desired voltage level for each channel, supporting 1.8 V, 2.5 V, 3.3 V, and 5 V buses. All I/O pins are 5.5 V tolerant, and the recommended supply range is 2.3 to 5.5 V.
At power-up or after internal power-on reset, all switch channels are deselected. An active-low RESET input resets the I2C state machine and deselects all channels. Package choices include 16-pin SOIC, TVSOP, TSSOP, and VQFN variants with listed thermal resistance values for board-level design review.
Key Features
- Quad bidirectional switch controlled through I2C bus
- Four downstream channel pairs from one upstream SCL/SDA pair
- Any channel combination selectable by programmable control register
- I2C bus and SMBus compatible switching interface
- Three address pins support up to eight devices per bus
- Active-low RESET deselects channels and resets I2C state machine
- Power-up state has all switch channels deselected
- Supports 1.8 V, 2.5 V, 3.3 V, and 5 V buses
- All I/O pins are 5.5 V tolerant
- Operates from 0 to 400 kHz I2C/SMBus clock
Typical Applications
- I2C bus channel expansion
- SMBus channel switching
- Multi-voltage I2C bus routing
- Shared upstream controller fanout
- Address-conflict device isolation
- Selectable downstream sensor buses
- Resettable I2C branch control
Procurement Notes
When requesting a quote for PCA9546A, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What function does the PCA9546A provide on an I2C bus?
The PCA9546A is a quad bidirectional translating switch controlled through the I2C bus. It routes one upstream SCL/SDA pair to four downstream channel pairs, with any individual channel or channel combination selected through a programmable control register.
How many PCA9546A devices can share one I2C bus?
The device includes three address pins. According to the extracted datasheet facts, those pins allow up to eight PCA9546A devices to be placed on the same I2C bus.
What bus voltages does the PCA9546A support?
The PCA9546A supports 1.8 V, 2.5 V, 3.3 V, and 5 V buses. External pull-up resistors set the desired voltage level for each channel, and all I/O pins are specified as 5.5 V tolerant.
What happens after power-up or RESET on the PCA9546A?
At power-up or after internal power-on reset, all switch channels are deselected. The active-low RESET input also resets the I2C state machine and deselects all channels.
What operating supply and temperature ranges are specified?
The recommended supply voltage range is 2.3 to 5.5 V. The recommended operating free-air temperature range is -40 to 85 °C, based on the extracted operating-condition facts.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 7, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.