Specifications
| Type | Description |
|---|---|
| Part Number | SN74AUP2G14 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | SC70 (6) 2.00 mm x 1.25 mm; SON (6) 1.45 mm x 1.00 mm; SON (6) 1.00 mm x 1.00 mm; DSBGA (6) 1.00 mm x 1.40 mm |
| Component Type | Other |
| Logic Function | Y = inverted A; two independent inverters; condition: Positive logic Schmitt-trigger inverter; source page 1 |
| Supply Voltage Range | 0.8 to 3.6 V; condition: Recommended operating conditions; source page 5 |
| Input Voltage Range | 0 to 3.6 V; condition: Recommended operating conditions; source page 5 |
| Output Voltage Range | 0 to VCC V; condition: Recommended operating conditions; source page 5 |
| Operating Free-Air Temperature | -40 to 85 °C; condition: Recommended operating conditions; source page 5 |
| Static Supply Current | 0.5 typ, 0.9 max uA; condition: IO=0, VI=GND or VCC to 3.6 V, VCC=0.8 to 3.6 V, TA=-40°C to 85°C; source page 6 |
| Input Leakage Current | 0.1 typ, 0.5 max uA; condition: A or B input, VI=GND to 3.6 V, VCC=0 to 3.6 V; source page 6 |
| Power-Off Leakage Current | 0.2 typ, 0.6 max uA; condition: VI or VO=0 to 3.6 V, VCC=0 V; source page 6 |
| Delta Power-Off Leakage Current | 0.2 typ, 0.6 max uA; condition: VI or VO=0 to 3.6 V, VCC=0 to 0.2 V; source page 6 |
| Delta Supply Current | 40 typ, 50 max uA; condition: VI=VCC-0.6 V, IO=0, VCC=3.3 V; source page 6 |
| Input Capacitance | 1.5 pF typ; condition: VI=VCC or GND, VCC=0 V or 3.6 V; source page 6 |
| Output Capacitance | 3 pF typ; condition: VO=GND, VCC=0 V; source page 6 |
| Power Dissipation Capacitance | 4.3 pF typ; condition: f=10 MHz, VCC=3.3 V ±0.3 V, TA=25°C; source page 8 |
| Positive-Going Input Threshold | 0.3 min, 0.6 max V; condition: VCC=0.8 V, TA=-40°C to 85°C; source page 6 |
| Positive-Going Input Threshold | 1.88 min, 2.29 max V; condition: VCC=3 V, TA=-40°C to 85°C; source page 6 |
| Negative-Going Input Threshold | 0.1 min, 0.6 max V; condition: VCC=0.8 V, TA=-40°C to 85°C; source page 6 |
| Negative-Going Input Threshold | 0.88 min, 1.24 max V; condition: VCC=3 V, TA=-40°C to 85°C; source page 6 |
| Input Hysteresis | 0.07 min, 0.5 max V; condition: VT+ - VT-, VCC=0.8 V, TA=-40°C to 85°C; source page 6 |
| Input Hysteresis | 0.79 min, 1.31 max V; condition: VT+ - VT-, VCC=3 V, TA=-40°C to 85°C; source page 6 |
| High-Level Output Voltage | VCC - 0.1 V min; condition: IOH=-20 uA, VCC=0.8 to 3.6 V, TA=-40°C to 85°C; source page 6 |
| High-Level Output Voltage | 2.55 V min; condition: IOH=-4 mA, VCC=3 V, TA=-40°C to 85°C; source page 6 |
| Low-Level Output Voltage | 0.1 V max; condition: IOL=20 uA, VCC=0.8 to 3.6 V, TA=-40°C to 85°C; source page 6 |
| Low-Level Output Voltage | 0.45 V max; condition: IOL=4 mA, VCC=3 V, TA=-40°C to 85°C; source page 6 |
| Propagation Delay | 2.4 typ, 4.3 max ns; condition: A to Y, CL=5 pF, VCC=3.3 V ±0.3 V, TA=-40°C to 85°C; source page 7 |
| Propagation Delay | 3.5 typ, 5.6 max ns; condition: A to Y, CL=10 pF, VCC=3.3 V ±0.3 V, TA=-40°C to 85°C; source page 7 |
| Propagation Delay | 3.4 typ, 5.9 max ns; condition: A to Y, CL=15 pF, VCC=3.3 V ±0.3 V, TA=-40°C to 85°C; source page 7 |
| Propagation Delay | 4.7 typ, 7.5 max ns; condition: A to Y, CL=30 pF, VCC=3.3 V ±0.3 V, TA=-40°C to 85°C; source page 8 |
| High-Level Output Current | -4 mA; condition: VCC=3 V, recommended operating conditions; source page 5 |
| Low-Level Output Current | 4 mA; condition: VCC=3 V, recommended operating conditions; source page 5 |
| Partial-Power-Down Support | Ioff supports partial-power-down mode; outputs disabled when powered down; condition: Device feature description; source page 1 |
| I/O Tolerance | 3.6 V tolerant; condition: Mixed-mode signal operation; source page 1 |
| Absolute Maximum Supply Voltage | -0.5 to 4.6 V; condition: Over operating free-air temperature range; source page 4 |
| Absolute Maximum Input Voltage | -0.5 to 4.6 V; condition: Input current ratings observed; source page 4 |
| Continuous Output Current | ±20 mA; condition: Absolute maximum rating; source page 4 |
| Continuous Current Through VCC or GND | ±50 mA; condition: Absolute maximum rating; source page 4 |
| Storage Temperature | -65 to 150 °C; condition: Absolute maximum rating; source page 4 |
| ESD Rating HBM | ±2000 V; condition: Human-body model per ANSI/ESDA/JEDEC JS-001; source page 4 |
| ESD Rating CDM | ±1000 V; condition: Charged-device model per JEDEC JESD22-C101; source page 4 |
| Thermal Resistance Junction-to-Ambient | 234 °C/W; condition: DRY SON package; source page 5 |
| Thermal Resistance Junction-to-Ambient | 300 °C/W; condition: DSF SON package; source page 5 |
| Thermal Resistance Junction-to-Ambient | 132 °C/W; condition: YFP DSBGA package; source page 5 |
| Thermal Resistance Junction-to-Ambient | 252 °C/W; condition: DCK SC70 package; source page 5 |
| Pin 1A | Pin 1 on DCK/DRY/DSF, ball A1 on YFP; condition: Gate 1 logic input; source page 3 |
| Pin 1Y | Pin 6 on DCK/DRY/DSF, ball A2 on YFP; condition: Gate 1 inverted output; source page 3 |
| Pin 2A | Pin 3 on DCK/DRY/DSF, ball C1 on YFP; condition: Gate 2 logic input; source page 3 |
| Pin 2Y | Pin 4 on DCK/DRY/DSF, ball C2 on YFP; condition: Gate 2 inverted output; source page 3 |
| Pin VCC | Pin 5 on DCK/DRY/DSF, ball B2 on YFP; condition: Supply/power pin; source page 3 |
| Pin GND | Pin 2 on DCK/DRY/DSF, ball B1 on YFP; condition: Ground pin; source page 3 |
| Datasheet Status | request_only |
Product Overview
SN74AUP2G14 is a Texas Instruments dual Schmitt-trigger inverter in the Signal_Chain category. It provides two independent positive-logic inverter channels, with each output implementing Y = inverted A. The Schmitt-trigger input behavior is defined by positive-going and negative-going thresholds, including hysteresis ranges specified at 0.8 V and 3 V supplies.
The recommended operating range covers 0.8 to 3.6 V on VCC, 0 to 3.6 V on inputs, and 0 to VCC on outputs across -40 to 85 °C free-air temperature. Electrical data includes 0.5 µA typical static supply current, 0.1 µA typical input leakage, 0.2 µA typical power-off leakage, and 4.3 pF typical power dissipation capacitance at 10 MHz and 3.3 V.
Package options include 6-pin SC70, 6-pin SON footprints, and 6-ball DSBGA. Pin data identifies separate 1A/1Y and 2A/2Y channels with VCC and GND assignments for DCK, DRY, DSF, and YFP packages, supporting compact assemblies for low-voltage inversion, hysteresis-based signal conditioning, mixed-mode logic interfaces, and partial-power-down designs.
Key Features
- Dual positive-logic Schmitt-trigger inverter architecture
- Y output equals inverted A input on each gate
- 0.8 to 3.6 V recommended supply range
- 0 to 3.6 V recommended input range
- 3.6 V tolerant I/O for mixed-mode operation
- Ioff supports partial-power-down mode
- 0.5 uA typical static supply current
- 1.5 pF typical input capacitance
- 2.4 ns typical propagation delay at 5 pF
- SC70, SON, and DSBGA package options
Typical Applications
- Low-voltage logic inversion
- Schmitt-trigger signal conditioning
- Mixed-mode signal interfaces
- Partial-power-down logic isolation
- Compact dual-inverter layouts
- 3.3 V logic paths
- Hysteresis-based input cleanup
Procurement Notes
When requesting a quote for SN74AUP2G14, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What logic function does SN74AUP2G14 implement?
SN74AUP2G14 implements two independent positive-logic Schmitt-trigger inverters. For each channel, the output Y is the inverted version of the corresponding A input.
What supply voltage range is recommended for this device?
The recommended VCC operating range is 0.8 to 3.6 V. Inputs are specified from 0 to 3.6 V, and outputs operate from 0 to VCC over the recommended conditions.
Does SN74AUP2G14 support partial-power-down operation?
Yes. The extracted datasheet facts state that Ioff supports partial-power-down mode, and the outputs are disabled when the device is powered down.
Which packages are listed for SN74AUP2G14?
The listed package options are 6-pin SC70 at 2.00 mm x 1.25 mm, two 6-pin SON sizes at 1.45 mm x 1.00 mm and 1.00 mm x 1.00 mm, and 6-ball DSBGA at 1.00 mm x 1.40 mm.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 21, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.