Specifications
| Type | Description |
|---|---|
| Part Number | SN74LVC1G3157 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | SOT-23 (DBV) 6-pin 2.90mm x 1.60mm; SC70 (DCK) 6-pin 2.00mm x 1.25mm; SOT (DRL) 6-pin 1.60mm x 1.20mm; SON (DRY) 6-pin 1.45mm x 1.00mm; DSBGA (YZP) 6-pin 1.41mm x 0.91mm; SON (DSF) 6-pin 1.00mm x 1.00mm; X2SON (DTB) 6-pin 0.80mm x 1.00mm |
| Supply Voltage Operating Range | 1.65 to 5.5 V; recommended operating condition |
| Switch Input/Output Voltage Range | 0 to VCC V; recommended operating condition; max of VCC |
| Control Input Voltage Range | 0 to 5.5 V; recommended operating condition |
| High-Level Control Input Voltage | 0.75 x VCC min; VCC = 1.65 V to 1.95 V |
| High-Level Control Input Voltage | 0.7 x VCC min; VCC = 2.3 V to 5.5 V |
| Low-Level Control Input Voltage | 0.25 x VCC max; VCC = 1.65 V to 1.95 V |
| Low-Level Control Input Voltage | 0.3 x VCC max; VCC = 2.3 V to 5.5 V |
| Input Transition Rise/Fall Rate | 20 ns/V max; VCC = 1.8 V ±0.15 V or 2.5 V ±0.2 V |
| Input Transition Rise/Fall Rate | 10 ns/V max; VCC = 3.3 V ±0.3 V or 5 V ±0.5 V |
| Operating Free-Air Temperature | -40 to 85 °C; BGA package YZP |
| Operating Free-Air Temperature | -40 to 125 °C; DBV, DCK, DRL, DRY, DSF packages |
| Absolute Maximum Supply Voltage | -0.5 to 6.5 V; YZP, DSF, DTB, DRY, DRL packages |
| Absolute Maximum Supply Voltage | -0.5 to 6 V; DBV, DCK packages |
| Absolute Maximum Switch I/O Voltage | -0.5 to VCC + 0.5 V; limited to 5.5 V max |
| On-State Switch Current | -128 to 128 mA; VI/O = 0 to VCC |
| Continuous Current Through VCC or GND | -100 to 100 mA; absolute maximum rating |
| Junction Temperature | 150 °C max; absolute maximum rating |
| Storage Temperature | -65 to 150 °C; absolute maximum rating |
| HBM ESD Rating | ±2000 V; ANSI/ESDA/JEDEC JS-001 |
| CDM ESD Rating | ±1000 V; JEDEC JESD22-C101 |
| ON-State Switch Resistance | 11 Ω typ, 20 Ω max; VCC = 1.65 V, VI = 0 V, IO = 4 mA, TA = 25°C typ; max over -40°C to 85°C/125°C |
| ON-State Switch Resistance | 15 Ω typ, 50 Ω max; VCC = 1.65 V, VI = 1.65 V, IO = -4 mA, TA = 25°C typ; max over -40°C to 85°C/125°C |
| ON-State Switch Resistance | 8 Ω typ, 12 Ω max; VCC = 2.3 V, VI = 0 V, IO = 8 mA, TA = 25°C typ; max over -40°C to 85°C/125°C |
| ON-State Switch Resistance | 11 Ω typ, 30 Ω max; VCC = 2.3 V, VI = 2.3 V, IO = -8 mA, TA = 25°C typ; max over -40°C to 85°C/125°C |
| ON-State Switch Resistance | 7 Ω typ, 9 Ω max; VCC = 3 V, VI = 0 V, IO = 24 mA, TA = 25°C typ; max over -40°C to 85°C/125°C |
| ON-State Switch Resistance | 9 Ω typ, 20 Ω max; VCC = 3 V, VI = 3 V, IO = -24 mA, TA = 25°C typ; max over -40°C to 85°C/125°C |
| ON-State Switch Resistance | 6 Ω typ, 7 Ω max; VCC = 4.5 V, VI = 0 V, IO = 30 mA, TA = 25°C typ; max over -40°C to 85°C/125°C |
| ON-State Switch Resistance | 7 Ω typ, 12 Ω max; VCC = 4.5 V, VI = 2.4 V, IO = 30 mA, TA = 25°C typ; max over -40°C to 85°C/125°C |
| ON-State Switch Resistance | 7 Ω typ, 15 Ω max; VCC = 4.5 V, VI = 4.5 V, IO = -30 mA, TA = 25°C typ; max over -40°C to 85°C/125°C |
| ON-State Resistance Over Signal Range | 140 Ω max; YZP, DSF, DTB, DRY, DRL; VCC = 1.65 V, 0 ≤ VBn ≤ VCC, IA = -4 mA |
| ON-State Resistance Over Signal Range | 45 Ω max; YZP, DSF, DTB, DRY, DRL; VCC = 2.3 V, 0 ≤ VBn ≤ VCC, IA = -8 mA |
| ON-State Resistance Over Signal Range | 18 Ω max; YZP, DSF, DTB, DRY, DRL; VCC = 3 V, 0 ≤ VBn ≤ VCC, IA = -24 mA |
| ON-State Resistance Over Signal Range | 10 Ω max; YZP, DSF, DTB, DRY, DRL; VCC = 4.5 V, 0 ≤ VBn ≤ VCC, IA = -30 mA |
| ON-State Resistance Over Signal Range | 200 Ω max; DBV, DCK; VCC = 1.65 V, 0 ≤ VBn ≤ VCC, IA = -4 mA |
| ON-State Resistance Over Signal Range | 65 Ω max; DBV, DCK; VCC = 2.3 V, 0 ≤ VBn ≤ VCC, IA = -8 mA |
| ON-State Resistance Over Signal Range | 25 Ω max; DBV, DCK; VCC = 3 V, 0 ≤ VBn ≤ VCC, IA = -24 mA |
| ON-State Resistance Over Signal Range | 15 Ω max; DBV, DCK; VCC = 4.5 V, 0 ≤ VBn ≤ VCC, IA = -30 mA |
| Maximum ON Resistance Match Between Channels | 0.5 Ω max; VCC = 1.65 V, VBn = 1.15 V, IA = -4 mA |
| Maximum ON Resistance Match Between Channels | 0.1 Ω typ, 0.3 Ω max; VCC = 2.3 V, VBn = 1.6 V, IA = -8 mA |
| Maximum ON Resistance Match Between Channels | 0.1 Ω typ, 0.3 Ω max; VCC = 3 V, VBn = 2.1 V, IA = -24 mA |
| Maximum ON Resistance Match Between Channels | 0.1 Ω typ, 0.2 Ω max; VCC = 4.5 V, VBn = 3.15 V, IA = -30 mA |
| ON Resistance Flatness | 110 Ω max; VCC = 1.65 V, 0 ≤ VBn ≤ VCC, IA = -4 mA |
| ON Resistance Flatness | 26 Ω typ, 40 Ω max; VCC = 2.3 V, 0 ≤ VBn ≤ VCC, IA = -8 mA |
| ON Resistance Flatness | 9 Ω typ, 10 Ω max; VCC = 3 V, 0 ≤ VBn ≤ VCC, IA = -24 mA |
| ON Resistance Flatness | 4 Ω typ, 5 Ω max; VCC = 4.5 V, 0 ≤ VBn ≤ VCC, IA = -30 mA |
| Switch OFF Leakage Current | ±0.05 µA typ, ±0.1 µA max at 25°C; ±1 µA max over temperature; VCC = 1.65 V to 5.5 V, 0 ≤ VI/O ≤ VCC |
| ON-State Switch Leakage Current | ±0.1 µA typ, ±1 µA max; VCC = 5.5 V, VI = VCC or GND, VO = open |
| Control Input Current | ±0.05 µA typ, ±0.1 µA max at 25°C; ±1 µA max over temperature; VCC = 0 to 5.5 V, 0 ≤ VIN ≤ VCC |
| Supply Current | 1 µA typ, 10 µA max from -40°C to 85°C, 35 µA max from -40°C to 125°C; VCC = 5.5 V, S = VCC or GND |
| Quiescent Device Current Increase | 500 µA max; VCC = 5.5 V, S = VCC - 0.6 V |
| Control Input Capacitance | 2.7 pF typ; VCC = 5 V, S at VDD/2 |
| Switch I/O Off Capacitance | 5.2 pF typ; VCC = 5 V, Bn at VDD/2 |
| Switch I/O On Capacitance | 17.3 pF typ; VCC = 5 V, Bn or A at VDD/2 |
| Typical Operating Frequency | 340 MHz typ; room temperature |
| High-Speed Switching | 0.5 ns typ; VCC = 3 V, CL = 50 pF |
| Signal Handling | Rail-to-rail; signal amplitudes up to VCC peak; analog or digital signals transmitted in either direction |
| Break-Before-Make Switching | Specified; feature statement |
| Latch-Up Performance | Exceeds 100 mA; per JESD 78, class II |
| Pin Function B2 | Switch I/O; set S high to enable; DBV, DCK, DRY, DRL, DSF, DTB pin 1; YZP pin A1 |
| Pin Function B1 | Switch I/O; set S low to enable; DBV, DCK, DRY, DRL, DSF, DTB pin 3; YZP pin C1 |
| Pin Function A | Common terminal; DBV, DCK, DRY, DRL, DSF, DTB pin 4; YZP pin C2 |
| Pin Function S | Select input; DBV, DCK, DRY, DRL, DSF, DTB pin 6; YZP pin A2 |
| Datasheet Status | request_only |
Product Overview
The SN74LVC1G3157 is a Texas Instruments single-pole double-throw analog switch in the Signal_Chain category. It provides one common terminal, A, and two switch I/O terminals, B1 and B2, selected by the S control input. B1 is enabled when S is low, while B2 is enabled when S is high. The switch can transmit analog or digital signals in either direction with rail-to-rail signal handling up to VCC peak.
Recommended operation covers a 1.65 V to 5.5 V supply range, switch I/O voltages from 0 to VCC, and control input voltages from 0 to 5.5 V. Control thresholds scale with supply voltage, with VIH minimums of 0.75 x VCC or 0.7 x VCC depending on VCC range, and VIL maximums of 0.25 x VCC or 0.3 x VCC.
Package choices include 6-pin SOT-23, SC70, SOT, SON, DSBGA, and X2SON formats. The YZP BGA package is specified for -40 to 85 °C operation, while DBV, DCK, DRL, DRY, and DSF packages support -40 to 125 °C operation. Applications should follow the stated current, leakage, capacitance, ESD, and absolute maximum limits from the manufacturer technical datasheet.
Key Features
- Single-pole double-throw analog switch topology
- 1.65 V to 5.5 V operating supply range
- Rail-to-rail bidirectional analog or digital signal handling
- 340 MHz typical operating frequency at room temperature
- 0.5 ns typical switching at 3 V supply
- Specified break-before-make switching behavior
- Control input supports 0 V to 5.5 V range
- Low switch off leakage over operating temperature
- HBM ±2000 V and CDM ±1000 V ESD ratings
- Multiple 6-pin SOT, SON, DSBGA, and X2SON packages
Typical Applications
- Rail-to-rail signal selection
- Analog signal multiplexing
- Digital signal routing
- Bidirectional switch paths
- Low-voltage signal-chain switching
- Common-terminal SPDT routing
- Package-constrained signal switching
Procurement Notes
When requesting a quote for SN74LVC1G3157, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What supply range does the SN74LVC1G3157 support?
The SN74LVC1G3157 has a recommended operating supply voltage range of 1.65 V to 5.5 V. Its switch input/output voltage range is 0 to VCC, and the control input voltage range is 0 to 5.5 V.
How are the B1 and B2 switch paths selected?
The A terminal is the common terminal. B1 is a switch I/O enabled when the S select input is low, while B2 is a switch I/O enabled when S is high.
What packages are specified for this analog switch?
The device is listed in 6-pin package options including SOT-23 DBV, SC70 DCK, SOT DRL, SON DRY, DSBGA YZP, SON DSF, and X2SON DTB, with package dimensions provided for each option.
What signal handling does the device support?
The SN74LVC1G3157 transmits analog or digital signals in either direction. The signal handling is rail-to-rail, with signal amplitudes supported up to VCC peak according to the extracted datasheet facts.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.