SUM110P0 P-channel Power MOSFET

Texas Instruments Power_Management — specifications, applications, sourcing support and RFQ.

SUM110P0 P-channel Power MOSFET

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Part Number
SUM110P0
Manufacturer
Texas Instruments
Package
TO-263 (D2PAK), 3-lead; Version 1 dimensions: D=8.636-9.652 mm, E=9.652-10.414 mm, L=14.605-15.875 mm; e=2.54 mm BSC
Category
Power Management
Product Type
LDO Regulator

Quick Sourcing Note

SUM110P0 from Texas Instruments is a Power_Management P-channel power MOSFET using TrenchFET Power MOSFET technology. It is supplied in a 3-lead TO-263 (D2PAK) package with 2.54 mm BSC lead pitch and Version 1 package dimensions. Key ratings include -40 V drain-source voltage, ±20 V gate-source voltage, -110 A continuous drain current, -240 A pulsed drain current, and 375 W case-rated power dissipation at TC=25°C. Electrical parameters include 0.0042 Ω maximum RDS(on) at VGS=-10 V and ID=-30 A, 235 nC typical total gate charge, and -55 to 175°C junction operation.

Specifications

TypeDescription
Part NumberSUM110P0
ManufacturerTexas Instruments
Product TypeLDO Regulator
CategoryPower Management
Package / CaseTO-263 (D2PAK), 3-lead; Version 1 dimensions: D=8.636-9.652 mm, E=9.652-10.414 mm, L=14.605-15.875 mm; e=2.54 mm BSC
Drain-Source Voltage-40 V; Absolute maximum rating, TC=25°C unless otherwise noted
Gate-Source Voltage±20 V; Absolute maximum rating, TC=25°C unless otherwise noted
Continuous Drain Current-110 A; TJ=175°C, TC=25°C, package limited
Continuous Drain Current-110 A; TJ=175°C, TC=125°C, package limited
Pulsed Drain Current-240 A; Absolute maximum rating
Avalanche Current-75 A; L=0.1 mH
Single Pulse Avalanche Energy281 mJ; L=0.1 mH, duty cycle <=1%
Power Dissipation375 W; TC=25°C; see SOA curve for voltage derating
Power Dissipation3.75 W; TA=25°C, mounted on 1 inch square FR-4 PCB
Operating Junction Temperature Range-55 to 175 °C; Absolute maximum rating
Storage Temperature Range-55 to 175 °C; Absolute maximum rating
Junction-to-Ambient Thermal Resistance40 °C/W; PCB mount, mounted on 1 inch square FR-4 PCB
Junction-to-Case Thermal Resistance0.4 °C/W; Thermal resistance rating
Drain-Source Breakdown Voltagemin -40 V; VGS=0 V, ID=-250 µA, TJ=25°C
Gate Threshold Voltagemin -1 V, max -3 V; VDS=VGS, ID=-250 µA, TJ=25°C
Gate-Body Leakagemax ±100 nA; VDS=0 V, VGS=±20 V, TJ=25°C
Zero Gate Voltage Drain Currentmax -1 µA; VDS=-40 V, VGS=0 V, TJ=25°C
Zero Gate Voltage Drain Currentmax -50 µA; VDS=-40 V, VGS=0 V, TJ=125°C
Zero Gate Voltage Drain Currentmax -250 µA; VDS=-40 V, VGS=0 V, TJ=175°C
On-State Drain Currentmin -120 A; VDS=-5 V, VGS=-10 V, pulse test
Drain-Source On-State Resistancetyp 0.0034 Ω, max 0.0042 Ω; VGS=-10 V, ID=-30 A, TJ=25°C, pulse test
Drain-Source On-State Resistancemax 0.0063 Ω; VGS=-10 V, ID=-30 A, TJ=125°C, pulse test
Drain-Source On-State Resistancemax 0.0076 Ω; VGS=-10 V, ID=-30 A, TJ=175°C, pulse test
Drain-Source On-State Resistancetyp 0.005 Ω, max 0.0062 Ω; VGS=-4.5 V, ID=-20 A, TJ=25°C, pulse test
Forward Transconductancetyp 20 S; VDS=-15 V, ID=-30 A, pulse test
Input Capacitancetyp 11200 pF; VGS=0 V, VDS=-25 V, f=1 MHz
Output Capacitancetyp 1650 pF; VGS=0 V, VDS=-25 V, f=1 MHz
Reverse Transfer Capacitancetyp 1200 pF; VGS=0 V, VDS=-25 V, f=1 MHz
Total Gate Chargetyp 235 nC, max 350 nC; VDS=-20 V, VGS=-10 V, ID=-110 A
Gate-Source Chargetyp 45 nC; VDS=-20 V, VGS=-10 V, ID=-110 A
Gate-Drain Chargetyp 65 nC; VDS=-20 V, VGS=-10 V, ID=-110 A
Gate Resistancetyp 3 Ω; TJ=25°C
Turn-On Delay Timetyp 25 ns, max 40 ns; VDD=-20 V, RL=0.18 Ω, ID≈-110 A, VGEN=-10 V, Rg=2.5 Ω
Rise Timetyp 30 ns, max 45 ns; VDD=-20 V, RL=0.18 Ω, ID≈-110 A, VGEN=-10 V, Rg=2.5 Ω
Turn-Off Delay Timetyp 190 ns, max 300 ns; VDD=-20 V, RL=0.18 Ω, ID≈-110 A, VGEN=-10 V, Rg=2.5 Ω
Fall Timetyp 110 ns, max 165 ns; VDD=-20 V, RL=0.18 Ω, ID≈-110 A, VGEN=-10 V, Rg=2.5 Ω
Source-Drain Diode Continuous Current-110 A; TC=25°C
Source-Drain Diode Pulsed Current-240 A; TC=25°C
Source-Drain Diode Forward Voltagetyp -1 V, max -1.5 V; IF=-85 A, VGS=0 V, pulse test
Reverse Recovery Timetyp 65 ns, max 100 ns; IF=-85 A, dI/dt=100 A/µs
Peak Reverse Recovery Currenttyp -3.7 A, max -5.6 A; IF=-85 A, dI/dt=100 A/µs
Reverse Recovery Chargetyp 0.12 µC, max 0.28 µC; IF=-85 A, dI/dt=100 A/µs
Lead-Free Ordering Part NumberSUM110P04-04L-E3; Ordering information
TechnologyTrenchFET Power MOSFET; Feature list
Datasheet Statusrequest_only

Product Overview

SUM110P0 is a Texas Instruments P-channel power MOSFET categorized under Power_Management. The extracted datasheet facts identify it as a TrenchFET Power MOSFET with a -40 V drain-source rating and ±20 V gate-source rating. Its continuous drain current is specified at -110 A for both TC=25°C and TC=125°C with package limitation, while pulsed drain current is rated at -240 A.

The device is packaged in a TO-263 (D2PAK), 3-lead case. Version 1 package dimensions are D=8.636-9.652 mm, E=9.652-10.414 mm, L=14.605-15.875 mm, with e=2.54 mm BSC. Thermal ratings include 0.4°C/W junction-to-case resistance and 40°C/W junction-to-ambient resistance on a 1 inch square FR-4 PCB.

For power switching use, the MOSFET provides 0.0034 Ω typical and 0.0042 Ω maximum drain-source on-state resistance at VGS=-10 V, ID=-30 A, and TJ=25°C. The datasheet also lists gate charge, capacitance, switching time, avalanche, and source-drain diode recovery parameters for circuit design.

Key Features

  • P-channel power MOSFET for Power_Management circuits
  • TrenchFET Power MOSFET technology listed in features
  • -40 V drain-source absolute maximum rating
  • ±20 V gate-source absolute maximum rating
  • -110 A continuous drain current, package limited
  • -240 A pulsed drain current absolute maximum
  • 0.0042 Ω maximum RDS(on) at -10 V gate drive
  • 235 nC typical total gate charge at -110 A
  • 281 mJ single pulse avalanche energy rating
  • TO-263 (D2PAK), 3-lead package case

Typical Applications

  • Power management switching stages
  • High-current P-channel load switching
  • -40 V rail control circuits
  • Low RDS(on) power paths
  • Avalanche-rated switching circuits
  • TO-263 surface-mount power assemblies
  • Source-drain diode recovery designs

Procurement Notes

When requesting a quote for SUM110P0, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.

FAQ

What type of device is SUM110P0?

SUM110P0 is identified in the extracted datasheet facts as a Texas Instruments P-channel power MOSFET in the Power_Management category. The feature list specifies TrenchFET Power MOSFET technology.

What package is used for SUM110P0?

The package case is TO-263 (D2PAK), 3-lead. Version 1 dimensions are D=8.636-9.652 mm, E=9.652-10.414 mm, L=14.605-15.875 mm, with e=2.54 mm BSC.

What are the main voltage and current ratings?

The extracted absolute maximum ratings list -40 V drain-source voltage, ±20 V gate-source voltage, -110 A continuous drain current under package-limited conditions, and -240 A pulsed drain current.

What is the specified on-state resistance?

At VGS=-10 V, ID=-30 A, and TJ=25°C, drain-source on-state resistance is 0.0034 Ω typical and 0.0042 Ω maximum. Higher-temperature maximum values are 0.0063 Ω at 125°C and 0.0076 Ω at 175°C.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 21, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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