Specifications
| Type | Description |
|---|---|
| Part Number | TAS2564 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | 36-pin DSBGA, YFP package, 2.63 mm x 2.46 mm nominal body size |
| Output Power | 7 W; 8 Ω load, 3.8 V, 0.1% THD+N |
| Boost Architecture | 256-level, 13 V Class-H boost; integrated boost converter |
| Efficiency | 83.5%; 1 W output, 1% THD+N, 4.2 V into 8 Ω |
| Hardware Shutdown VBAT Current | <1 µA; hardware shutdown |
| VBAT Supply Voltage | 2.7-5.5 V; recommended operating condition |
| VDD Supply Voltage | 1.65-1.95 V, 1.8 V nominal; recommended operating condition |
| External Boost Mode PVDD Supply Voltage | VBAT to 16 V; recommended operating condition |
| Minimum Speaker Impedance | 6.4 Ω min, 8 Ω nominal; recommended operating condition |
| Minimum Speaker Inductance | 10 µH; recommended operating condition |
| Sample Rate Range | 16 kSPS to 192 kSPS; digital audio interface |
| I2S/TDM Interface Capacity | 8 channels of 32 bits each up to 96 kSPS |
| I2C Addresses | 4 selectable addresses; I2C control interface |
| Receiver Mode Idle Channel Noise | 10 µVrms; receiver mode |
| Speaker Mode Idle Channel Noise | 15 µVrms; speaker mode |
| Signal-to-Noise Ratio | 110 dB; referenced to 1% THD+N output level, 8 Ω |
| Dynamic Range | 110 dB; A-weighted, -60 dBFS method |
| Absolute Maximum VDD | -0.3 to 2 V; analog/IO supply voltage |
| Absolute Maximum VBAT | -0.3 to 6 V; battery supply voltage |
| Absolute Maximum VBST | -0.3 to 18.5 V; PVDD can handle 19 V transients for less than 10 ns |
| Absolute Maximum PVDD | -0.3 to 18.5 V; PVDD can handle 19 V transients for less than 10 ns |
| Absolute Maximum SW Pin Voltage | -0.7 to 16 V; switching pin |
| Operating Free-Air Temperature | -40 to 85 °C; absolute maximum ratings table |
| Operating Junction Temperature | -40 to 150 °C; absolute maximum ratings table |
| Storage Temperature | -65 to 150 °C; absolute maximum ratings table |
| HBM ESD Rating, OUT_N/OUT_P/VSNS Pins | ±4000 V; ANSI/ESDA/JEDEC JS-001 |
| HBM ESD Rating | ±2000 V; ANSI/ESDA/JEDEC JS-001, other pins |
| CDM ESD Rating | ±500 V; JEDEC JESD22-C101 |
| Junction-to-Ambient Thermal Resistance | 54.3 °C/W; YFF WCSP, 36 pins |
| Junction-to-Case Top Thermal Resistance | 0.2 °C/W; YFF WCSP, 36 pins |
| Junction-to-Board Thermal Resistance | 11.8 °C/W; YFF WCSP, 36 pins |
| Digital Input High Threshold | 0.65 x VDD min; all digital pins except SDA and SCL |
| Digital Input Low Threshold | 0.35 x VDD max; all digital pins except SDA and SCL |
| I2C Input High Threshold | 0.7 x VDD min; SDA and SCL |
| I2C Input Low Threshold | 0.3 x VDD max; SDA and SCL |
| Internal Boost Full-Scale Output Voltage | 7.5 Vrms; measured at -6 dBFS input and scaled by 6 dB |
| Internal Boost Maximum Continuous Output Power | 1.75 W; RL=32 Ω + 33 µH, THD+N=0.03%, fin=1 kHz |
| Internal Boost Maximum Continuous Output Power | 7 W; RL=8 Ω + 33 µH, THD+N=0.03%, fin=1 kHz |
| Internal Boost THD+N | 0.01%; POUT=1 W, RL=8 Ω + 33 µH, fin=1 kHz |
| Internal Boost Idle Channel Noise | 14.8 µV; A-weighted, 20 Hz to 20 kHz |
| Class-D PWM Switching Frequency | 384 kHz; spread spectrum mode, CLASSD_SYNC=0 |
| Class-D PWM Switching Frequency | 352.8 kHz; fixed frequency mode, CLASSD_SYNC=1, fs=44.1/88.2/174.6 kHz |
| Class-D PWM Switching Frequency | 384 kHz; fixed frequency mode, CLASSD_SYNC=1, fs=48/96/192 kHz |
| Output Offset Voltage | -1.2 to 1.2 mV; electrical characteristics, internal boost |
| Programmable Digital Gain Range | 0 to 23 dBV; electrical characteristics |
| Programmable Digital Gain Step Size | 0.5 dB; electrical characteristics |
| Amplifier Gain Error | ±0.1 dB; POUT=1 W |
| Mute Attenuation | 110 dB; device in shutdown or muted in normal operation |
| Receiver Mode Full-Scale Output Voltage | 2 Vrms; measured at -6 dBFS input and scaled by 6 dB |
| Receiver Mode Maximum Continuous Output Power | 124.4 mW; RL=32 Ω + 33 µH, THD+N=0.03%, fin=1 kHz |
| Receiver Mode Maximum Continuous Output Power | 0.45 W; RL=8 Ω + 33 µH, THD+N=0.03%, fin=1 kHz |
| Receiver Mode Idle Channel Noise | 10 µV; A-weighted, 20 Hz to 20 kHz, DAC modulator running |
| Datasheet Status | request_only |
Product Overview
The TAS2564 is a Texas Instruments Signal_Chain Class-D smart audio amplifier with an integrated 256-level, 13 V Class-H boost converter. It is specified for 7 W output into an 8 Ω load at 3.8 V and 0.1% THD+N, with 83.5% efficiency at 1 W output, 1% THD+N, 4.2 V into 8 Ω.
The device supports a 2.7 V to 5.5 V VBAT supply, a 1.65 V to 1.95 V VDD supply, and external boost mode PVDD from VBAT to 16 V. Audio interface support includes 16 kSPS to 192 kSPS sample rates and I2S/TDM capacity for 8 channels of 32 bits each up to 96 kSPS.
It is packaged in a 36-pin DSBGA, YFP package with 2.63 mm x 2.46 mm nominal body size. Application fit is centered on speaker-mode and receiver-mode digital audio paths using 8 Ω nominal speakers, I2C control, and low idle-channel-noise operation.
Key Features
- 7 W output into 8 Ω at 3.8 V
- Integrated 256-level, 13 V Class-H boost converter
- 83.5% efficiency at 1 W into 8 Ω
- 2.7 V to 5.5 V VBAT supply range
- 16 kSPS to 192 kSPS sample rate support
- I2S/TDM supports 8 channels of 32 bits
- Four selectable I2C control addresses
- 110 dB signal-to-noise ratio at 8 Ω
- 0 to 23 dBV programmable digital gain
- Receiver mode full-scale output voltage is 2 Vrms
Typical Applications
- Speaker-mode digital audio paths
- Receiver-mode audio outputs
- I2S and TDM audio systems
- Battery-supplied audio amplifier circuits
- 8 Ω nominal speaker designs
- I2C-controlled audio subsystems
Procurement Notes
When requesting a quote for TAS2564, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What output power does the TAS2564 support?
The TAS2564 is specified for 7 W output into an 8 Ω load at 3.8 V and 0.1% THD+N. With internal boost conditions, it also lists 7 W maximum continuous output power into RL=8 Ω + 33 µH.
What supply ranges are specified for TAS2564?
The recommended VBAT supply voltage range is 2.7 V to 5.5 V. The VDD supply range is 1.65 V to 1.95 V, with 1.8 V nominal. External boost mode PVDD is specified from VBAT to 16 V.
What digital audio interface capability is listed?
The TAS2564 supports digital audio sample rates from 16 kSPS to 192 kSPS. Its I2S/TDM interface supports 8 channels of 32 bits each up to 96 kSPS, and the I2C control interface has four selectable addresses.
What package is used for the TAS2564?
The package is listed as a 36-pin DSBGA, YFP package with a 2.63 mm x 2.46 mm nominal body size. Thermal data is also given for a YFF WCSP, 36-pin package condition.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 8, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.