Specifications
| Type | Description |
|---|---|
| Part Number | TLV320AIC3204 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Component Type | Other |
| Package Case | VQFN (RHB), 32-pin, 5.00 mm x 5.00 mm nominal body |
| DAC SNR | 100 dB, stereo audio DAC |
| DAC Playback Power | 4.1 mW, stereo playback, 48 ksps DAC |
| ADC SNR | 93 dB, stereo audio ADC |
| ADC Record Power | 6.1 mW, stereo record, 48 ksps ADC |
| Analog Input Count | 6 single-ended or 3 fully-differential inputs, programmable analog inputs |
| Microphone Input Support | Stereo analog and digital microphone inputs |
| Output Support | Stereo headphone outputs and stereo line outputs |
| Microphone Bias | Programmable, integrated microphone bias output |
| PLL | Programmable PLL integrated for clock generation and routing |
| LDOs | Integrated LDOs for power supply integration |
| ADC PGA Gain Range | 0 to +47.5 dB |
| ADC PGA Gain Step | 0.5 dB steps |
| DAC Digital Volume Range | -72 to 0 dB |
| DAC Output Gain Range | -6 to +29 dB |
| Output Gain Step | 1 dB steps |
| Package Body Size | 5.00 mm x 5.00 mm |
| Package Pin Count | 32 pins |
| IO Voltage Supply Range | 1.1 V to 3.6 V, IOVDD pin supply |
| Analog Voltage Supply Range | 1.5 V to 1.95 V, AVDD pin |
| LDO Input/Headphone Supply Range | 1.9 V to 3.6 V, LDOIN/HPVDD pin |
| Digital Voltage Supply Range | 1.26 V to 1.95 V, DVDD pin when LDO_SELECT = 0 and D-LDO disabled |
| Control Interface Selection | SPI_SELECT = 1 for SPI, 0 for I2C |
| D-LDO Enable Selection | LDO_SELECT = 1 enable, 0 disabled |
| Reset Polarity | Active low |
| Absolute Maximum AVDD to AVSS | -0.3 V to 2.2 V |
| Absolute Maximum DVDD to DVSS | -0.3 V to 2.2 V |
| Absolute Maximum IOVDD to IOVSS | -0.3 V to 3.9 V |
| Absolute Maximum LDOIN to AVSS | -0.3 V to 3.9 V |
| Absolute Maximum Digital Input Voltage to Ground | -0.3 V to IOVDD + 0.3 V |
| Absolute Maximum Analog Input Voltage to Ground | -0.3 V to AVDD + 0.3 V |
| Operating Temperature Range | -40°C to 85°C |
| Maximum Junction Temperature | 105°C |
| Storage Temperature Range | -55°C to 125°C |
| ESD Rating, HBM | ±2000 V, per ANSI/ESDA/JEDEC JS-001, all pins |
| ESD Rating, CDM | ±750 V, per JEDEC JESD22-C101, all pins |
| Datasheet Status | request_only |
Product Overview
The TLV320AIC3204 is a Texas Instruments stereo audio codec categorized under Signal_Chain components. It combines stereo DAC and ADC functions with programmable analog input routing, supporting 6 single-ended or 3 fully differential analog inputs. The device also supports stereo analog and digital microphone inputs, with an integrated programmable microphone bias output for microphone interface designs.
For playback and recording paths, the codec provides 100 dB DAC SNR and 93 dB ADC SNR. At 48 ksps operation, the extracted datasheet values list 4.1 mW for stereo DAC playback power and 6.1 mW for stereo ADC record power. Gain control includes an ADC PGA range of 0 to +47.5 dB in 0.5 dB steps, DAC digital volume from -72 to 0 dB, and headphone or line output gain from -6 to +29 dB in 1 dB steps.
The device is supplied in a 32-pin VQFN (RHB) package with a 5.00 mm x 5.00 mm nominal body. System integration facts include selectable SPI or I2C control, active-low reset, programmable PLL clocking, integrated LDOs, and defined IOVDD, AVDD, DVDD, and LDOIN/HPVDD supply ranges for board-level power planning.
Key Features
- 100 dB SNR stereo audio DAC
- 93 dB SNR stereo audio ADC
- 4.1 mW stereo playback at 48 ksps DAC
- 6.1 mW stereo record at 48 ksps ADC
- 6 single-ended or 3 fully differential analog inputs
- Stereo analog and digital microphone input support
- Stereo headphone and stereo line output support
- Programmable microphone bias output integrated
- Programmable PLL for clock generation and routing
- Integrated LDOs for power supply integration
- ADC PGA gain from 0 to +47.5 dB
- 32-pin 5.00 mm x 5.00 mm VQFN package
Typical Applications
- Stereo microphone capture
- Digital microphone interface designs
- Headphone audio playback
- Stereo line-output audio systems
- Low-power audio record paths
- Low-power audio playback paths
- SPI-controlled codec designs
- I2C-controlled codec designs
Procurement Notes
When requesting a quote for TLV320AIC3204, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What type of device is the TLV320AIC3204?
The TLV320AIC3204 is a Texas Instruments stereo audio codec in the Signal_Chain category. It includes stereo DAC and ADC functions, analog and digital microphone input support, headphone outputs, and line outputs.
What package is used for TLV320AIC3204?
The extracted datasheet facts list a VQFN (RHB) package with 32 pins and a 5.00 mm x 5.00 mm nominal body size for the TLV320AIC3204.
What are the DAC and ADC SNR values?
For the stereo audio paths, the extracted facts specify 100 dB SNR for the DAC and 93 dB SNR for the ADC.
Which control interfaces can be selected?
The control interface is selected through the SPI_SELECT pin. The extracted fact states SPI_SELECT = 1 selects SPI, while SPI_SELECT = 0 selects I2C.
What gain control ranges are documented?
The ADC PGA gain range is 0 to +47.5 dB in 0.5 dB steps. DAC digital volume spans -72 to 0 dB, and headphone or line output gain spans -6 to +29 dB in 1 dB steps.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.