TPS3431 Programmable Watchdog Timer

Texas Instruments Power_Management — specifications, applications, sourcing support and RFQ.

TPS3431 Programmable Watchdog Timer

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Part Number
TPS3431
Manufacturer
Texas Instruments
Package
DRB VSON-8, 3.00 mm x 3.00 mm
Category
Power Management
Product Type
LDO Regulator

Quick Sourcing Note

TPS3431 from Texas Instruments is a programmable watchdog timer in the Power_Management category, supplied in a DRB VSON-8 package measuring 3.00 mm x 3.00 mm. It operates from a 1.8 V to 6.5 V VDD range with 10 µA typical quiescent current and an active-low open-drain WDO output. The watchdog timeout accuracy is ±2.5% typical at 25°C, with supported timing options including capacitor-programmed timing, preset CWD configurations, and disabled states through SET1. Recommended operation covers -40°C to +125°C junction temperature, with watchdog reset delay specified at 170 ms to 230 ms.

Specifications

TypeDescription
Part NumberTPS3431
ManufacturerTexas Instruments
Product TypeLDO Regulator
CategoryPower Management
Component TypePower_IC
Package / CaseDRB VSON-8, 3.00 mm x 3.00 mm
Watchdog Timeout Accuracy±2.5% typical; at 25°C
Input Voltage Range1.8 V to 6.5 V; VDD operating range
Quiescent Current10 µA typical; IDD
Output TypeActive-low open-drain; WDO watchdog output
Operating Junction Temperature Range-40°C to +125°C; recommended operating range
Supply Voltage Absolute Maximum-0.3 V to 7 V; VDD, over operating free-air temperature range
Output Voltage Absolute Maximum-0.3 V to 7 V; ENOUT, WDO
Input Voltage Absolute Maximum-0.3 V to 7 V; SET1, WDI, EN
CWD Voltage Absolute Maximum-0.3 V to VDD + 0.3 V; maximum is VDD + 0.3 V or 7.0 V, whichever is smaller
Output Pin Current Absolute Maximum±20 mA; ENOUT, WDO
Input Current Absolute Maximum±20 mA; all pins
Operating Junction Temperature Absolute Maximum-40°C to +150°C; TJ
Operating Free-Air Temperature Absolute Maximum-40°C to +150°C; TA
Storage Temperature Range-65°C to +150°C; Tstg
HBM ESD Rating±4000 V; per ANSI/ESDA/JEDEC JS-001
CDM ESD Rating±1000 V; per JEDEC JESD22-C101
Recommended Supply Voltage1.8 V min, 6.5 V max; VDD
SET1 Pin Voltage0 V min, 6.5 V max; recommended operating condition
Watchdog Timing Capacitor0.1 nF min, 1000 nF max; 0.1 nF gives tWDU(typ) = 62.74 ms, 1000 nF gives tWDU(typ) = 77.45 s
CWD Pullup Resistor9 kΩ min, 10 kΩ nominal, 11 kΩ max; pullup resistor to VDD
ENOUT and WDO Pullup Resistor1 kΩ min, 10 kΩ nominal, 100 kΩ max; RPU
EN Pin Current10 mA max; IEN recommended operating condition
Watchdog Output Current10 mA max; IWDO recommended operating condition
Recommended Junction Temperature-40°C min, +125°C max; TJ
Junction-to-Ambient Thermal Resistance50.7°C/W; DRB VSON, 8 pins
Junction-to-Case Top Thermal Resistance51.6°C/W; DRB VSON, 8 pins
Junction-to-Board Thermal Resistance25.8°C/W; DRB VSON, 8 pins
Junction-to-Top Characterization Parameter1.3°C/W; DRB VSON, 8 pins
Junction-to-Board Characterization Parameter25.8°C/W; DRB VSON, 8 pins
Junction-to-Case Bottom Thermal Resistance7.1°C/W; DRB VSON, 8 pins
Supply Current10 µA typ, 19 µA max; 1.8 V <= VDD <= 6.5 V, -40°C <= TJ <= +125°C, open-drain pullups 10 kΩ, typical at TJ = 25°C
Power-On Reset Voltage0.8 V typ; VPOR, VOL(max) = 0.25 V
EN Internal Pullup Current500 nA min, 620 nA typ, 700 nA max; VEN = 0 V
CWD Pin Charge Current347 nA min, 375 nA typ, 403 nA max; CWD = 0.5 V
CWD Pin Threshold Voltage1.196 V min, 1.21 V typ, 1.224 V max; 1.8 V <= VDD <= 6.5 V, -40°C <= TJ <= +125°C
Output Low Voltage0.4 V max; ENOUT, WDO; VDD = 5 V, ISINK = 3 mA
Output Leakage Current1 µA max; ENOUT, WDO; VDD = 1.8 V, VWDO = 6.5 V
Low-Level Input Voltage0.25 V max; EN, SET1
High-Level Input Voltage0.8 V min; EN, SET1
WDI Low-Level Input Voltage0.3 x VDD max; WDI
WDI High-Level Input Voltage0.8 x VDD min; WDI
CWD Pin Evaluation Period381 µs typ; tINIT
EN and SET1 Pin Setup Time1 µs typ; timing requirement
Startup Delay300 µs typ; during power-on, VDD must be at least 1.8 V before WDI is active and ENOUT is high impedance
EN to ENOUT Delay200 ns typ; tEN_ENOUT
Watchdog Reset Delay170 ms min, 200 ms typ, 230 ms max; tRST
Watchdog Timeout1360 ms min, 1600 ms typ, 1840 ms max; CWD = NC, SET1 = 1
Watchdog Timeout170 ms min, 200 ms typ, 230 ms max; CWD = 10 kΩ to VDD, SET1 = 1
Watchdog Disabled StateWatchdog disabled; CWD = NC, SET1 = 0
Watchdog Disabled StateWatchdog disabled; CWD = 10 kΩ to VDD, SET1 = 0
WDI Response Setup Time After Enable150 µs typ; tWD-setup, setup time required for device to respond to changes on WDI after being enabled
Minimum WDI Pulse Duration50 ns typ; WDI input pulse
WDI to WDO Delay50 ns typ; tWD-del
VDD Pin FunctionSupply voltage pin; 0.1 µF bypass capacitor recommended for noisy systems; pin 1
CWD Pin FunctionSets watchdog timeout with capacitor to ground or selects preset timeouts when connected through 10 kΩ to VDD or left unconnected; pin 2
EN Pin FunctionInternally pulled up to VDD; logic low drives ENOUT low, ignores WDI, and keeps WDO logic high; pin 3
SET1 Pin FunctionGrounding SET1 disables watchdog timer; pin 5
WDI Pin FunctionFalling edge must occur before watchdog timeout expires; pin 6
WDO Pin FunctionOpen-drain active-low output asserts low when watchdog timeout occurs for tRST; pin 7, use 1 kΩ to 100 kΩ pullup resistor
ENOUT Pin FunctionOpen-drain active-high enable output asserts after tRST when EN goes logic high; pin 8, use 1 kΩ to 100 kΩ pullup resistor
Datasheet Statusrequest_only

Product Overview

The TPS3431 is a Texas Instruments programmable watchdog timer for Power_Management designs requiring monitored WDI activity and an active-low open-drain watchdog output. The device operates across a 1.8 V to 6.5 V VDD range and uses a WDO output that asserts low when the watchdog timeout occurs for the reset interval.

Timing is configured through the CWD and SET1 pins. The CWD pin can set watchdog timeout with a capacitor to ground, or select preset timeouts when connected through 10 kΩ to VDD or left unconnected. Grounding SET1 disables the watchdog timer. Extracted timing parameters include a 200 ms typical watchdog reset delay, 1600 ms typical timeout with CWD not connected and SET1 high, and 200 ms typical timeout with CWD tied to VDD through 10 kΩ and SET1 high.

The device is offered in a DRB VSON-8, 3.00 mm x 3.00 mm package. Pin-level implementation details include a recommended 0.1 µF VDD bypass capacitor for noisy systems, 1 kΩ to 100 kΩ pullup resistors on WDO and ENOUT, and a 9 kΩ to 11 kΩ CWD pullup resistor when used.

Key Features

  • Programmable watchdog timer in DRB VSON-8 package
  • 1.8 V to 6.5 V VDD operating range
  • 10 µA typical quiescent current rating
  • ±2.5% typical watchdog timeout accuracy at 25°C
  • Active-low open-drain WDO watchdog output
  • Capacitor-programmed or preset CWD watchdog timing
  • SET1 grounding disables the watchdog timer
  • 170 ms to 230 ms watchdog reset delay
  • -40°C to +125°C recommended junction operation
  • 1 kΩ to 100 kΩ WDO and ENOUT pullups

Typical Applications

  • Watchdog timer circuits
  • Power-management monitoring
  • Enable-output sequencing
  • WDI activity supervision
  • Capacitor-programmed timeout designs
  • Preset watchdog timeout designs
  • Open-drain reset signaling
  • Noisy supply systems

Procurement Notes

When requesting a quote for TPS3431, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.

FAQ

What supply voltage range does the TPS3431 support?

The TPS3431 operates from a 1.8 V to 6.5 V VDD range. The same 1.8 V minimum and 6.5 V maximum are listed as the recommended supply-voltage operating condition.

How is the TPS3431 watchdog timeout configured?

The CWD pin sets the watchdog timeout with a capacitor to ground, or selects preset timeouts when connected through 10 kΩ to VDD or left unconnected. Grounding SET1 disables the watchdog timer.

What type of watchdog output does the TPS3431 provide?

The WDO watchdog output is active-low and open-drain. It asserts low when a watchdog timeout occurs for tRST, and the pin function specifies use of a 1 kΩ to 100 kΩ pullup resistor.

What package is specified for the TPS3431?

The TPS3431 package case is DRB VSON-8, measuring 3.00 mm x 3.00 mm. The listed thermal data applies to the DRB VSON package with 8 pins.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 7, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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