Specifications
| Type | Description |
|---|---|
| Part Number | TPS3840 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | SOT-23-5 (DBV), 2.90 mm x 1.60 mm nominal |
| Component Type | Power_IC |
| Operating Input Supply Voltage | 1.5-10 V; recommended operating conditions |
| Wide Operating Voltage | 1.5-10 V; feature summary |
| Supply Current | 300 nA typ, 700 nA max; VDD = 1.5 V to <10 V, VDD > VIT+, TA = -40°C to 125°C |
| Fixed Negative-Going Threshold Range | 1.6-4.9 V in 0.1 V steps; device threshold voltage options |
| Negative-Going Input Threshold Accuracy | -1.5% min, 1% typ, 1.5% max; -40°C to 125°C |
| Threshold Hysteresis | 175 mV min, 200 mV typ, 225 mV max; VIT- = 3.1 V to 4.9 V |
| Threshold Hysteresis | 75 mV min, 100 mV typ, 125 mV max; VIT- = 1.6 V to 3.0 V |
| Startup Delay | 100 us min, 220 us typ, 350 us max; CT pin open |
| Reset Time Delay | 50 us; CT pin open |
| Reset Time Delay | 6.2 ms; CT pin = 10 nF |
| Reset Time Delay | 619 ms; CT pin = 1 uF |
| Programmable Reset Delay Range | 50 us to 6.2 s; no capacitor to 10 uF capacitor on CT pin |
| VDD Falling Propagation Detect Delay | 15 us typ, 30 us max; VDD = VIT+ to VIT- - 10%, CT pin open |
| VDD Glitch Immunity | 10 us; VIT- 5% overdrive |
| Manual Reset Pulse Duration | 300 ns; MR pin pulse duration to initiate reset |
| MR Low to Reset Propagation Delay | 700 ns; VDD = 4.5 V, MR < VMR_L |
| MR Release to Reset Deassert Delay | tD ms; VDD = 4.5 V, MR transitions from VMR_L to VMR_H |
| Manual Reset Logic Low Input | 600 mV max; electrical characteristics |
| Manual Reset Logic High Input | 0.7 x VDD; electrical characteristics |
| Manual Reset Internal Pull-Up Resistance | 100 kOhm; electrical characteristics |
| CT Pin Internal Resistance | 350 kOhm min, 500 kOhm typ, 650 kOhm max; electrical characteristics |
| Output Topology | Open-drain active-low RESET; TPS3840DL variant, requires pull-up resistor |
| Output Topology | Push-pull active-low RESET; TPS3840PL variant |
| Output Topology | Push-pull active-high RESET; TPS3840PH variant |
| TPS3840PL Power-On Reset Voltage | 300 mV; VOL(max) = 200 mV, IOUT(sink) = 200 nA |
| TPS3840PH Power-On Reset Voltage | 950 mV; VOH, IOUT(source) = 500 nA |
| TPS3840DL Power-On Reset Voltage | 950 mV; VOL(max) = 0.2 V, IOUT(sink) = 5.6 uA |
| TPS3840PL Low-Level Output Voltage | 200 mV max; 1.5 V < VDD < 5 V, VDD < VIT-, IOUT(sink) = 2 mA |
| TPS3840PL High-Level Output Voltage | 0.8 x VDD min; 1.5 V < VDD < 5 V, VDD > VIT+, IOUT(source) = 2 mA |
| TPS3840PL High-Level Output Voltage | 0.8 x VDD min; 5 V < VDD < 10 V, VDD > VIT+, IOUT(source) = 5 mA |
| TPS3840PH Low-Level Output Voltage | 200 mV max; 1.5 V < VDD < 5 V, VDD > VIT+, IOUT(sink) = 2 mA |
| TPS3840PH Low-Level Output Voltage | 200 mV max; 1.5 V < VDD < 5 V, VDD > VIT+, IOUT(sink) = 5 mA |
| TPS3840PH High-Level Output Voltage | 0.8 x VDD min; 1.5 V < VDD < 5 V, VDD < VIT-, IOUT(source) = 2 mA |
| TPS3840DL Low-Level Output Voltage | 200 mV max; 1.5 V < VDD < 5 V, VDD < VIT-, IOUT(sink) = 2 mA |
| Open-Drain Output Leakage Current | 90 nA max; RESET pin high impedance, VDD = VRESET = 5.5 V, VIT+ < VDD |
| Recommended RESET Pin Voltage | 0-10 V; RESET and RESET pins |
| Recommended RESET Pin Current | 0 to +/-5 mA; RESET and RESET pins |
| Recommended Manual Reset Pin Voltage | 0 V to VDD; recommended operating conditions |
| Operating Junction Temperature | -40°C to 125°C; recommended operating conditions |
| Absolute Maximum VDD Voltage | -0.3 V to 12 V; absolute maximum ratings |
| Absolute Maximum Open-Drain RESET Voltage | -0.3 V to 12 V; TPS3840DL absolute maximum ratings |
| Absolute Maximum MR Voltage | -0.3 V to 12 V; absolute maximum ratings |
| Absolute Maximum CT Voltage | -0.3 V to 5.5 V; absolute maximum ratings |
| Absolute Maximum RESET Pin Current | +/-70 mA; RESET and RESET pins |
| Storage Temperature | -65°C to 150°C; absolute maximum ratings |
| Operating Junction Temperature Absolute Maximum | -40°C to 150°C; absolute maximum ratings |
| ESD Human Body Model | +/-2000 V; ANSI/ESDA/JEDEC JS-001 |
| ESD Charged Device Model | +/-750 V; JEDEC JESD22-C101 |
| Junction-to-Ambient Thermal Resistance | 187.5°C/W; DBV SOT23-5 package |
| Junction-to-Case Top Thermal Resistance | 109.2°C/W; DBV SOT23-5 package |
| Junction-to-Board Thermal Resistance | 92.8°C/W; DBV SOT23-5 package |
| Junction-to-Top Characterization Parameter | 35.4°C/W; DBV SOT23-5 package |
| Junction-to-Board Characterization Parameter | 92.5°C/W; DBV SOT23-5 package |
| Pin Count | 5 pins; DBV SOT-23 package |
| CT Pin Function | User-programmable reset delay time; connect external capacitor to adjust reset delay, leave floating for smallest fixed delay |
| VDD Pin Function | Input supply voltage monitored by device; Pin 2 |
| Datasheet Status | request_only |
Product Overview
The TPS3840 is a Texas Instruments nano power voltage supervisor for Power_Management designs that monitor an input supply voltage through the VDD pin. The recommended operating input range is 1.5-10 V, and the device supports fixed negative-going threshold options from 1.6-4.9 V in 0.1 V steps.
Reset behavior is defined by threshold accuracy, hysteresis, CT-pin timing, and reset output topology. The negative-going input threshold accuracy is specified from -1.5% to 1.5% across -40°C to 125°C. Hysteresis is 75-125 mV for 1.6-3.0 V threshold options and 175-225 mV for 3.1-4.9 V options. The CT pin provides user-programmable reset delay, with 50 us when open and up to 6.2 s with a 10 uF capacitor.
The DBV SOT-23-5 package has 5 pins and nominal dimensions of 2.90 mm x 1.60 mm. Variant outputs include TPS3840DL open-drain active-low RESET, TPS3840PL push-pull active-low RESET, and TPS3840PH push-pull active-high RESET.
Key Features
- 1.5-10 V recommended operating input supply range
- 300 nA typical supply current across operating range
- Fixed 1.6-4.9 V thresholds in 0.1 V steps
- Negative-going threshold accuracy specified to +/-1.5%
- Programmable reset delay from 50 us to 6.2 s
- CT pin supports external capacitor delay adjustment
- Manual reset input with 100 kOhm internal pull-up
- Open-drain active-low RESET option for TPS3840DL
- Push-pull active-low RESET option for TPS3840PL
- Push-pull active-high RESET option for TPS3840PH
- 10 us VDD glitch immunity at 5% overdrive
- -40°C to 125°C recommended junction operation
Typical Applications
- Supply voltage monitoring
- Power-on reset timing
- Manual reset circuits
- Open-drain RESET interfaces
- Push-pull RESET outputs
- CT-programmed reset delay
- Low-current power management
- SOT-23-5 supervisor designs
Procurement Notes
When requesting a quote for TPS3840, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What supply voltage range does the TPS3840 support?
The TPS3840 has a recommended operating input supply voltage range of 1.5-10 V. The VDD pin is the monitored input supply pin, and the device is specified for nanoampere supply current across its operating voltage conditions.
What reset delay options are specified for TPS3840?
With the CT pin open, reset delay is specified as 50 us and startup delay is 100 us minimum, 220 us typical, and 350 us maximum. The programmable reset delay range is 50 us to 6.2 s using no capacitor through a 10 uF CT capacitor.
Which reset output topologies are available?
The TPS3840 family includes TPS3840DL with open-drain active-low RESET requiring a pull-up resistor, TPS3840PL with push-pull active-low RESET, and TPS3840PH with push-pull active-high RESET.
What package is specified for the TPS3840?
The extracted package information lists a SOT-23-5 DBV package with 5 pins and nominal dimensions of 2.90 mm x 1.60 mm. Thermal data is specified for the DBV SOT23-5 package.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 8, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.