Specifications
| Type | Description |
|---|---|
| Part Number | TPS61033 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | SOT583 (DRL), 8-pin, 2.10 mm x 1.20 mm nominal body size |
| Component Type | Power_IC |
| Input Voltage Range | 1.8-5.5 V; recommended operating condition |
| Output Voltage Setting Range | 2.2-5.5 V; TPS61033 adjustable output |
| Fixed Output Voltage | 5.0 V typ, 4.93 V min, 5.07 V max; FB connected to VIN, VIN < VOUT, PWM mode |
| Valley Switch Current Limit, TPS61033 | 5.5 A typ, 4.7 A min, 6.1 A max; VIN=3.6 V, VOUT=5.0 V |
| Valley Switch Current Limit, TPS610333 | 1.85 A typ, 1.55 A min, 2.25 A max; VIN=3.6 V, VOUT=5.0 V |
| Switching Frequency | 2.4 MHz typ, 2.0 MHz min, 2.8 MHz max; VIN=3.6 V, VOUT=5.0 V, PWM mode |
| High-Side MOSFET On Resistance | 46 mOhm typ; VOUT=5.0 V |
| Low-Side MOSFET On Resistance | 25 mOhm typ; VOUT=5.0 V |
| Quiescent Current Into VIN | 20 uA typ, 13 uA min, 25 uA max; IC enabled, no load, no switching, VIN=1.8-5.5 V, VFB=VREF+0.1 V, TJ up to 125°C |
| Quiescent Current Into VOUT | 5.3 uA typ, 9 uA max; IC enabled, no load, no switching, VOUT=2.2-5.5 V, VFB=VREF+0.1 V, TJ up to 125°C |
| Shutdown Current Into VIN and SW | 0.1 uA typ, 0.2 uA max; IC disabled, VIN=VSW=3.6 V, TJ=25°C |
| Reference Voltage at FB Pin, PWM Mode | 600 mV typ, 591 mV min, 609 mV max |
| Reference Voltage at FB Pin, PFM Mode | 606 mV typ |
| Output Overvoltage Protection Threshold | 5.75 V typ, 5.5 V min, 6.0 V max; VOUT rising |
| Output Overvoltage Protection Hysteresis | 0.11 V typ |
| Under-Voltage Lockout Threshold, VIN Rising | 1.79 V max, 1.7 V typ |
| Under-Voltage Lockout Threshold, VIN Falling | 1.6 V typ |
| VIN UVLO Hysteresis | 65 mV typ |
| Effective Inductance Range | 0.33-1.3 uH, 0.47 uH nominal; recommended operating condition |
| Effective Input Capacitance Range | 1.0-4.7 uF; recommended operating condition |
| Effective Output Capacitance Range, IOUT <= 1 A | 4-1000 uF, 10 uF nominal |
| Effective Output Capacitance Range, IOUT > 1 A | 10-1000 uF, 20 uF nominal |
| Operating Junction Temperature | -40 to 125°C; recommended operating condition |
| Absolute Maximum Terminal Voltage | -0.3 to 7 V; VIN, EN, FB, SW, VOUT terminals |
| Absolute Maximum SW Spike Voltage, 10 ns | -0.7 to 8 V |
| Absolute Maximum SW Spike Voltage, 1 ns | -0.7 to 9 V |
| Absolute Maximum Junction Temperature | -40 to 150°C; operating junction temperature |
| Storage Temperature | -65 to 150°C; absolute maximum rating |
| ESD Rating HBM | +/-2000 V; Human-body model per ANSI/ESDA/JEDEC JS-001 |
| ESD Rating CDM | +/-750 V; Charged-device model per JEDEC JESD22-C101 |
| FB Pin Leakage Current, TJ=25°C | 4 nA typ, 25 nA max |
| FB Pin Leakage Current, TJ=125°C | 5 nA typ, 30 nA max |
| VOUT Pin Leakage Current | 0.2 uA typ, 0.5 uA max; IC disabled, VIN=0 V, VSW=0 V, VOUT=5.5 V, TJ=25°C |
| Soft Startup Time | 0.86 ms typ; internal soft-start ramp time |
| Minimum On Time | 48 ns typ, 20 ns min, 65 ns max; power switch |
| Minimum Off Time | 35 ns min, 70 ns max; power switch |
| Reverse Current Limit | -1.4 A typ; MODE=1, VIN=3.6 V, VOUT=5.0 V |
| Pre-Charge Current | 330 mA typ; VIN=1.8-5.5 V, VOUT < 0.4 V |
| Maximum Pre-Charge Current | 800 mA min, 1100 mA max; TPS610333, VIN=2.4 V, VOUT > 0.4 V |
| EN Logic High Threshold | 1.2 V min; VIN > 1.8 V or VOUT > 2.2 V |
| EN Logic Low Threshold | 0.4 V max; VIN > 1.8 V or VOUT > 2.2 V |
| MODE Logic High Threshold | 1.2 V min; VIN > 1.8 V or VOUT > 2.2 V |
| MODE Logic Low Threshold | 0.4 V max; VIN > 1.8 V or VOUT > 2.2 V |
| EN Internal Pull-Down Resistor | 10 Mohm typ; EN pin |
| MODE Internal Pull-Down Resistor | 1 Mohm typ; MODE pin |
| Power Good Upper Threshold | 107% typ, 105% min, 110% max; percentage of VOUT setting |
| Power Good Lower Threshold | 93% typ, 91% min, 95% max; percentage of VOUT setting |
| Power Good Threshold Hysteresis | 2.5% typ; upper threshold rising and falling, percentage of VOUT setting |
| Delay Time to PGOOD High Signal | 1.3 ms typ; PGOOD rising |
| PGOOD Glitch Filter Time | 33 us typ; PGOOD falling |
| Thermal Shutdown Threshold, TJ Rising | 170°C typ |
| Thermal Shutdown Threshold, TJ Falling | 155°C typ |
| Thermal Shutdown Hysteresis | 15°C typ; TJ falling below TSD |
| Junction-to-Ambient Thermal Resistance | 117.5°C/W; DRL SOT583-8 package |
| Junction-to-Ambient Thermal Resistance, Standard EVM | 65.8°C/W; DRL SOT583-8 package |
| Efficiency at 1 A | 93.42%; VIN=3.3 V, VOUT=5 V, IOUT=1 A |
| Efficiency at 2 A | 90.78%; VIN=3.3 V, VOUT=5 V, IOUT=2 A |
| Operating Mode, MODE High | forced PWM mode |
| Operating Mode, MODE Low | auto PFM mode |
| Power Good Output Type | open-drain output; PG pin |
| Shutdown Function | true disconnection between input and output during shutdown |
| Datasheet Status | request_only |
Product Overview
The TPS61033 is a Texas Instruments synchronous boost converter for Power_Management designs requiring conversion from a 1.8-5.5 V input range to an adjustable 2.2-5.5 V output range. For fixed 5 V operation, the device specifies 5.0 V typical output, with 4.93 V minimum and 5.07 V maximum, when FB is connected to VIN under VIN < VOUT and PWM-mode conditions.
The converter uses internal MOSFETs with 46 mOhm typical high-side on resistance and 25 mOhm typical low-side on resistance at VOUT=5.0 V. It operates at 2.4 MHz typical switching frequency in PWM mode and supports forced PWM when MODE is driven high or auto PFM when MODE is driven low. The PG pin is an open-drain power-good output with threshold, delay, and glitch-filter specifications.
The device is supplied in a compact SOT583 (DRL), 8-pin package with a 2.10 mm x 1.20 mm nominal body size. Recommended external component ranges include 0.33-1.3 uH effective inductance, 1.0-4.7 uF effective input capacitance, and output capacitance ranges selected by output current. Protection-related specifications include output overvoltage protection, VIN UVLO, thermal shutdown, and true input-to-output disconnection during shutdown.
Key Features
- 1.8-5.5 V recommended input voltage range
- 2.2-5.5 V adjustable output voltage setting range
- 5.0 V fixed output when FB connects to VIN
- 2.4 MHz typical PWM-mode switching frequency
- 5.5 A typical valley switch current limit for TPS61033
- 46 mOhm high-side and 25 mOhm low-side MOSFET resistance
- 20 uA typical VIN quiescent current when enabled
- 0.1 uA typical shutdown current into VIN and SW
- Forced PWM mode and auto PFM mode selection
- Open-drain PG pin with power-good thresholds
- True input-to-output disconnection during shutdown
- -40 to 125°C recommended junction temperature range
Typical Applications
- 1.8-5.5 V input boost rails
- 2.2-5.5 V regulated outputs
- 5 V fixed-output conversion
- Forced PWM boost operation
- Auto PFM light-load operation
- Power-good monitored output rails
- Compact SOT583 power designs
- Shutdown-disconnected power paths
Procurement Notes
When requesting a quote for TPS61033, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What input voltage range does TPS61033 support?
TPS61033 is specified for a 1.8-5.5 V input voltage range as a recommended operating condition. The VIN under-voltage lockout threshold is 1.7 V typical on rising VIN and 1.6 V typical on falling VIN.
What output voltage range can TPS61033 regulate?
For the adjustable TPS61033 output, the setting range is 2.2-5.5 V. A 5.0 V fixed-output configuration is specified when FB is connected to VIN, with 4.93 V minimum and 5.07 V maximum in PWM mode.
Which operating modes are selected by the MODE pin?
When the MODE pin is connected to a logic high voltage, TPS61033 operates in forced PWM mode. When MODE is connected to a logic low voltage, it operates in auto PFM mode.
What package is used for the TPS61033?
TPS61033 is listed in the SOT583 (DRL), 8-pin package. The extracted package detail gives a 2.10 mm x 1.20 mm nominal body size for this package case.
What protection and monitoring functions are specified?
The extracted specifications include output overvoltage protection with a 5.75 V typical rising threshold, VIN under-voltage lockout, thermal shutdown at 170°C typical on rising junction temperature, and an open-drain PG output.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 25, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.