Specifications
| Type | Description |
|---|---|
| Part Number | TPS92641 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | HTSSOP, TPS92640: 14-pin PWP 4.40 mm x 5.00 mm; TPS92641: 16-pin PWP 4.40 mm x 5.00 mm |
| Input Voltage Range | 7 to 85 V; recommended operating conditions |
| Junction Temperature Range | -40 to 125 °C; recommended operating conditions |
| Analog Dimming Range | 500:1; feature specification |
| Standard PWM Dimming Range | 2500:1; feature specification |
| Shunt FET PWM Dimming Range | 20000:1; TPS92641 feature specification |
| Gate Driver Capability | 2 Ω, 1 A peak; MOSFET gate drivers |
| Maximum Switching Frequency | Up to 1 MHz; oscillator frequency range |
| VCC Regulation | Min 7.86 V, Typ 8.5 V, Max 9.14 V; ICC = 10 mA, VIN = 24 V or 85 V |
| VCC Current Limit | Min 48 mA, Typ 63 mA, Max 78 mA; VCC = 0 V |
| Quiescent Current | Typ 2 mA, Max 3 mA; UDIM = 3 V, static, VIN = 7 V, 24 V, or 85 V |
| Shutdown Current | Max 100 µA; UDIM = 0 V |
| VCC UVLO Threshold Rising | Typ 5.04 V, Max 5.9 V; VCC increasing |
| VCC UVLO Threshold Falling | Typ 4.5 V, Max 4.9 V; VCC decreasing |
| VCC UVLO Hysteresis | Typ 0.17 V; VCC UVLO |
| Reference Voltage | Min 2.97 V, Typ 3.03 V, Max 3.09 V; no load, VIN = 7 V, 24 V, or 85 V |
| VREF Current Limit | Min 1.3 mA, Typ 2.1 mA, Max 2.9 mA; VREF = 0 V |
| CS Reference Voltage | VIADJ / 10 V; with respect to GND |
| Error Amplifier Input Offset Voltage | Min -600 µV, Typ 0 µV, Max 600 µV; CS/COMP error amplifier |
| COMP Sink Current | Typ 85 µA; error amplifier |
| COMP Source Current | Typ 110 µA; error amplifier |
| Error Amplifier Transconductance | Typ 500 µA/V; CS/COMP error amplifier |
| Error Amplifier Linear Input Range | ±125 mV; specified by design, not verified by test |
| Transconductance Bandwidth | 400 kHz; -6 dB unloaded response, specified by design |
| Minimum Off-Time | Typ 230 ns; CS = 0 V |
| Minimum On-Time | Typ 235 ns; timers/overvoltage protection |
| Programmed On-Time | Typ 2.08 µs; VOUT = 2 V, RON = 25 kΩ, CON = 1 nF |
| RON Pulldown Resistance | Min 35 Ω, Typ 120 Ω; RON pin |
| Current Limit Off-Time | Typ 270 µs; timers/overvoltage protection |
| RON Threshold to HG Falling Delay | Typ 25 ns; timers/overvoltage protection |
| VOUT Overvoltage Threshold | Min 2.85 V, Typ 3.05 V, Max 3.25 V; VOUT rising |
| VOUT Overvoltage Hysteresis | Typ 0.13 V; VOUT OVP |
| LG Sourcing Resistance | Typ 1.5 Ω, Max 6 Ω; LG = high |
| LG Sinking Resistance | Typ 1 Ω, Max 4.5 Ω; LG = low |
| HG Sourcing Resistance | Typ 3.9 Ω, Max 6 Ω; HG = high |
| HG Sinking Resistance | Typ 1.1 Ω, Max 4.5 Ω; HG = low |
| BOOT UVLO Threshold | Min 1.9 V, Typ 3.4 V, Max 4.5 V; BOOT-SW rising |
| BOOT UVLO Hysteresis | Typ 1.8 V; BOOT-SW falling |
| HG to LG Deadtime | Typ 60 ns; HG fall to LG rise |
| LG to HG Deadtime | Typ 60 ns; LG fall to HG rise |
| SDRV Sourcing Resistance | Typ 5.6 Ω, Max 30 Ω; SDRV = high, TPS92641 only |
| SDIM to SDRV Rising Delay | Typ 68 ns, Max 100 ns; SDIM rising, TPS92641 only |
| SDIM to SDRV Falling Delay | Typ 29 ns, Max 70 ns; SDIM falling, TPS92641 only |
| SDIM Rising Threshold | Typ 1.29 V, Max 1.74 V; SDIM rising, TPS92641 only |
| SDIM Falling Threshold | Typ 0.5 V; SDIM falling, TPS92641 only |
| SDIM Pullup Resistance | Typ 90 kΩ; TPS92641 only |
| IADJ Clamp Voltage | Min 2.46 V, Typ 2.54 V, Max 2.62 V; analog adjust pin |
| IADJ Input Impedance | Typ 1 MΩ; analog adjust pin |
| UDIM Start-Up Threshold | Min 1.21 V, Typ 1.276 V, Max 1.342 V; UDIM rising |
| UDIM Hysteresis Current | Min 12 µA, Typ 21 µA, Max 30 µA; UDIM pin |
| UDIM to HG/LG Rising Delay | Typ 168 ns, Max 260 ns; UDIM rising |
| UDIM to HG/LG Falling Delay | Typ 174 ns, Max 280 ns; UDIM falling |
| UDIM Low Power Threshold | Typ 370 mV; UDIM pin |
| UDIM Shutdown Detect Timer | Typ 8.5 ms, Max 13 ms; UDIM falling |
| Thermal Shutdown Threshold | Typ 165 °C; specified by design, not verified by test |
| Thermal Shutdown Hysteresis | Typ 20 °C; specified by design, not verified by test |
| Human Body Model ESD Rating | ±2000 V; TPS92640/TPS92641 PWP package, ANSI/ESDA/JEDEC JS-001 |
| Charged Device Model ESD Rating | ±1000 V; TPS92640/TPS92641 PWP package, JEDEC JESD22-C101 |
| Junction-to-Ambient Thermal Resistance | TPS92640: 40.1 °C/W; TPS92641: 38.7 °C/W; PWP HTSSOP package |
| Junction-to-Case Top Thermal Resistance | TPS92640: 24.6 °C/W; TPS92641: 22.7 °C/W; PWP HTSSOP package |
| Junction-to-Board Thermal Resistance | TPS92640: 20.9 °C/W; TPS92641: 16.5 °C/W; PWP HTSSOP package |
| Junction-to-Case Bottom Thermal Resistance | TPS92640: 2.5 °C/W; TPS92641: 1.7 °C/W; PWP HTSSOP package |
| Datasheet Status | request_only |
Product Overview
TPS92641 is a Texas Instruments synchronous buck LED controller in the Power_Management category. The device is specified for a recommended input voltage range of 7 to 85 V and a recommended junction temperature range of -40 to 125 °C, supporting LED driver designs that require high-voltage buck regulation and dimming control.
The TPS92641 package is a 16-pin PWP HTSSOP measuring 4.40 mm x 5.00 mm. Related package data also lists the TPS92640 as a 14-pin PWP HTSSOP in the same body size. Thermal metrics for the TPS92641 PWP package include 38.7 °C/W junction-to-ambient resistance, 22.7 °C/W junction-to-case top resistance, 16.5 °C/W junction-to-board resistance, and 1.7 °C/W junction-to-case bottom resistance.
Control and protection parameters include 500:1 analog dimming, 2500:1 standard PWM dimming, and TPS92641-only 20000:1 shunt FET PWM dimming. The controller provides MOSFET gate driver capability of 2 Ω and 1 A peak, up to 1 MHz switching frequency, VOUT overvoltage threshold of 3.05 V typical, and thermal shutdown at 165 °C typical.
Key Features
- 7 to 85 V recommended input voltage range
- -40 to 125 °C recommended junction temperature range
- 500:1 analog dimming range
- 2500:1 standard PWM dimming range
- 20000:1 TPS92641 shunt FET PWM dimming range
- 2 Ω, 1 A peak MOSFET gate drivers
- Switching frequency up to 1 MHz
- 8.5 V typical VCC regulation
- 3.03 V typical no-load reference voltage
- 165 °C typical thermal shutdown threshold
Typical Applications
- Synchronous buck LED drivers
- PWM-dimmed LED lighting
- Analog-dimmed LED channels
- Shunt FET dimming designs
- High input voltage LED supplies
- Thermally managed LED power stages
Procurement Notes
When requesting a quote for TPS92641, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What input voltage range does TPS92641 support?
TPS92641 is specified for a 7 to 85 V input voltage range under recommended operating conditions. This parameter applies to the Texas Instruments synchronous buck LED controller and is listed with a recommended junction temperature range of -40 to 125 °C.
What dimming ranges are specified for TPS92641?
The extracted datasheet facts list 500:1 analog dimming, 2500:1 standard PWM dimming, and 20000:1 shunt FET PWM dimming for the TPS92641. The shunt FET PWM dimming range is identified as a TPS92641 feature specification.
What package is used for the TPS92641?
TPS92641 is listed in a 16-pin PWP HTSSOP package measuring 4.40 mm x 5.00 mm. The extracted package information also notes the related TPS92640 in a 14-pin PWP HTSSOP with the same body dimensions.
What gate-driver capability is specified for TPS92641?
The MOSFET gate-driver capability is specified as 2 Ω and 1 A peak. Related driver parameters include typical 60 ns HG-to-LG and LG-to-HG deadtimes, plus separate HG and LG sourcing and sinking resistance values.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 12, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.