Specifications
| Type | Description |
|---|---|
| Part Number | UCC27519 |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | SOT-23 DBV, 5 pins, 2.90 mm x 1.60 mm nominal body |
| Peak Source Current | 4 A; VDD=12 V; symmetrical drive capability |
| Peak Sink Current | 4 A; VDD=12 V; symmetrical drive capability |
| Supply Voltage Range | 4.5-18 V; recommended operating range |
| Operating Junction Temperature Range | -40 to 140 °C; recommended operating conditions |
| Input and Enable Voltage Range | 0-18 V; IN+, IN-, and EN pins; recommended operating conditions |
| Propagation Delay | 17 ns typ; general description |
| Rise Time | 8 ns typ, 12 ns max; CLOAD=1.8 nF |
| Fall Time | 7 ns typ, 11 ns max; CLOAD=1.8 nF |
| IN+ to Output Propagation Delay | 6 ns min, 17 ns typ, 25 ns max; VDD=10 V, 7-V input pulse, CLOAD=1.8 nF; UCC27519 noninverting input |
| IN- to Output Propagation Delay | 6 ns min, 17 ns typ, 24 ns max; VDD=10 V, 7-V input pulse, CLOAD=1.8 nF; UCC27518 inverting input |
| EN to Output High Propagation Delay | 4 ns min, 12 ns typ, 16 ns max; CLOAD=1.8 nF, 5-V enable pulse |
| EN to Output Low Propagation Delay | 4 ns min, 12 ns typ, 19 ns max; CLOAD=1.8 nF, 5-V enable pulse |
| Supply Start Threshold at 25°C | 3.85 V min, 4.20 V typ, 4.57 V max; TA=25°C |
| Supply Start Threshold over Temperature | 3.80 V min, 4.20 V typ, 4.67 V max; TA=-40°C to 140°C |
| Minimum Operating Voltage After Supply Start | 3.45 V min, 3.9 V typ, 4.35 V max; UVLO turn-off threshold |
| Supply Voltage Hysteresis | 0.19 V min, 0.3 V typ, 0.45 V max; UVLO hysteresis |
| Startup Current, Input Asserted | 51 µA min, 85 µA typ, 123 µA max; VDD=3.4 V; IN+=VDD for UCC27519 or IN-=GND for UCC27518 |
| Startup Current, Input Deasserted | 51 µA min, 70 µA typ, 103 µA max; VDD=3.4 V; IN+=GND for UCC27519 or IN-=VDD for UCC27518 |
| Input High Threshold at 4.5 V | 55% VDD typ, 62% VDD max; IN+ or IN- input |
| Input Low Threshold at 4.5 V | 31% VDD min, 39% VDD typ; IN+ or IN- input |
| Input Hysteresis at 4.5 V | 16% VDD typ; IN+ or IN- input |
| Input High Threshold at 12 V | 55% VDD typ, 59% VDD max; IN+ or IN- input |
| Input Low Threshold at 12 V | 31% VDD min, 39% VDD typ; IN+ or IN- input |
| Input Hysteresis at 12 V | 16% VDD typ; IN+ or IN- input |
| Input High Threshold at 18 V | 55% VDD typ, 58% VDD max; IN+ or IN- input |
| Input Low Threshold at 18 V | 35% VDD min, 38% VDD typ; IN+ or IN- input |
| Input Hysteresis at 18 V | 17% VDD typ; IN+ or IN- input |
| Enable High Threshold | 2.1 V typ, 2.3 V max; VDD=12 V |
| Enable Low Threshold | 1.00 V min, 1.25 V typ; VDD=12 V |
| Enable Hysteresis | 0.86 V typ; VDD=12 V |
| Source/Sink Peak Current | -4/+4 A; CLOAD=0.22 µF, FSW=1 kHz; ensured by design |
| High Output Voltage Drop at 12 V | 50 mV typ, 90 mV max; VDD=12 V, IOUT=-10 mA; VDD-VOH |
| High Output Voltage Drop at 4.5 V | 60 mV typ, 130 mV max; VDD=4.5 V, IOUT=-10 mA; VDD-VOH |
| Low Output Voltage at 12 V | 5 mV typ, 11 mV max; VDD=12 V, IOUT=10 mA |
| Low Output Voltage at 4.5 V | 6 mV typ, 12 mV max; VDD=4.5 V, IOUT=10 mA |
| Output Pullup Resistance at 12 V | 5.0 Ω typ, 7.5 Ω max; VDD=12 V, IOUT=-10 mA |
| Output Pullup Resistance at 4.5 V | 5.0 Ω typ, 11.0 Ω max; VDD=4.5 V, IOUT=-10 mA |
| Output Pulldown Resistance at 12 V | 0.5 Ω typ, 1.0 Ω max; VDD=12 V, IOUT=10 mA |
| Output Pulldown Resistance at 4.5 V | 0.6 Ω typ, 1.2 Ω max; VDD=4.5 V, IOUT=10 mA |
| Absolute Maximum Supply Voltage | -0.3 to 20 V; over operating free-air temperature range |
| Absolute Maximum OUT Voltage | -0.3 to VDD+0.3 V; over operating free-air temperature range |
| Absolute Maximum Output Continuous Current | 0.3 A; source/sink current |
| Absolute Maximum Output Pulsed Current | 4 A; 0.5 µs pulse; source/sink current |
| Absolute Maximum Input and Enable Voltage | -0.3 to 20 V; IN+, IN-, and EN pins; maximum input voltage not restricted by VDD |
| Absolute Maximum Virtual Junction Temperature | -40 to 150 °C; operating virtual junction temperature TJ |
| Storage Temperature | -65 to 150 °C; Tstg |
| Lead Temperature | 300 °C; soldering, 10 sec |
| Reflow Temperature | 260 °C; lead temperature during reflow |
| HBM ESD Rating | ±4000 V; Human body model per ANSI/ESDA/JEDEC JS-001 |
| CDM ESD Rating | ±1000 V; Charged-device model per JEDEC JESD22-C101 |
| Junction-to-Ambient Thermal Resistance | 217.6 °C/W; SOT-23 DBV, 5 pins |
| Junction-to-Case Top Thermal Resistance | 85.8 °C/W; SOT-23 DBV, 5 pins |
| Junction-to-Board Thermal Resistance | 44.0 °C/W; SOT-23 DBV, 5 pins |
| Junction-to-Top Characterization Parameter | 4.0 °C/W; SOT-23 DBV, 5 pins |
| Junction-to-Board Characterization Parameter | 43.2 °C/W; SOT-23 DBV, 5 pins |
| Input Logic Type | CMOS threshold follows VDD bias voltage; UCC27518DBV and UCC27519DBV device comparison |
| UCC27519 Input Configuration | Noninverting input IN+; pin 3; output held low if IN+ is unbiased or floating |
| Enable Pin Behavior | EN low disables output; EN high or floating enables output; pin 1 function |
| Output Default State | Held low; during VDD UVLO, power up/down, or floating input pins |
| Datasheet Status | request_only |
Product Overview
The UCC27519 is a Texas Instruments low-side gate driver in the Power_Management category. The device uses a noninverting IN+ input on pin 3, with CMOS input thresholds that follow the VDD bias voltage. The output is held low if IN+ is unbiased or floating, and it is also held low during VDD UVLO and power up or down conditions.
Electrical operation is defined over a 4.5-18 V recommended VDD range and -40 to 140 °C operating junction temperature range. The driver provides 4 A peak source and 4 A peak sink current at VDD = 12 V, with source/sink peak current also specified as -4/+4 A under CLOAD = 0.22 µF and FSW = 1 kHz conditions. Typical propagation delay is 17 ns, with 8 ns typical rise time and 7 ns typical fall time at CLOAD = 1.8 nF.
The package is SOT-23 DBV with 5 pins and a 2.90 mm x 1.60 mm nominal body. Assembly and limit data include 300 °C lead temperature for 10 seconds, 260 °C reflow temperature, ±4000 V HBM ESD rating, and ±1000 V CDM ESD rating.
Key Features
- 4 A peak source current at VDD=12 V
- 4 A peak sink current at VDD=12 V
- 4.5-18 V recommended supply operating range
- -40 to 140 °C operating junction range
- 17 ns typical propagation delay
- 8 ns typical rise time with 1.8 nF load
- 7 ns typical fall time with 1.8 nF load
- Noninverting IN+ input for UCC27519
- EN low disables output; EN high or floating enables
- Output held low during UVLO and floating input conditions
- SOT-23 DBV 5-pin compact package
- ±4000 V HBM and ±1000 V CDM ESD ratings
Typical Applications
- Low-side gate-drive stages
- Power-management switching outputs
- Enable-controlled driver circuits
- CMOS-threshold control interfaces
- Compact SOT-23 driver layouts
- UVLO-protected output stages
Procurement Notes
When requesting a quote for UCC27519, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What type of device is the UCC27519?
The UCC27519 is a Texas Instruments low-side gate driver in the Power_Management category. It uses a noninverting IN+ input and provides symmetrical 4 A peak source and 4 A peak sink drive capability at VDD = 12 V.
What supply range does the UCC27519 support?
The recommended operating supply voltage range is 4.5-18 V. The absolute maximum supply voltage rating is -0.3 to 20 V over the operating free-air temperature range.
How does the UCC27519 output behave during UVLO?
The output default state is held low during VDD UVLO, power up or down, or when input pins are floating. The minimum operating voltage after supply start is specified by the UVLO turn-off threshold.
What package is used for the UCC27519?
The device is specified in a SOT-23 DBV, 5-pin package with a 2.90 mm x 1.60 mm nominal body. Thermal data includes 217.6 °C/W junction-to-ambient resistance for this package.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: July 13, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.