Specifications
| Type | Description |
|---|---|
| Part Number | 16605-01XE |
| Manufacturer | STMicroelectronics |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | SOP-8; pad pattern C1=5.40 mm, E=1.27 mm, X1=0.60 mm, Y1=1.55 mm |
| Number of channels | 2 channels; one channel each direction: VDD1 side inputs=1, VDD2 side inputs=1 |
| Default output level | High; ordering table for V62/16605-01XE |
| Isolation voltage rating | 3 kV rms; ordering table |
| Working temperature range | -40 to 125 °C; ordering table |
| Moisture sensitivity level | Level-2-260C-1 YEAR; ordering table |
| Reel quantity | 4000 pcs/reel; ordering table |
| Supply voltage absolute maximum | -0.5 to +7.0 V; VDD1-GND1, VDD2-GND2, TA=25°C |
| Input signal voltage absolute maximum | -0.5 V to VDDx + 0.5 V; VIA, VIB |
| Output voltage absolute maximum | -0.5 V to VDDx + 0.5 V; VOA, VOB |
| Output average current absolute maximum | -10 to +10 mA per channel; primary or secondary side output current |
| CMTI absolute maximum | -200 to +200 kV/us; common-mode transient immunity rating |
| Storage temperature range | -65 to +150 °C; absolute maximum rating |
| Recommended supply voltage | 3.0 to 5.5 V; VDDx operating condition |
| Input high level | 0.7*VDDx to VDDx V; recommended operating condition |
| Input low level | 0 to 0.3*VDDx V; recommended operating condition |
| Output high current | -6 mA; recommended operating condition, output high |
| Output low current | 6 mA; recommended operating condition, output low |
| Maximum data rate | 10 Mbps; within pulse-width distortion limit |
| Minimum pulse width | 100 ns; within pulse-width distortion limit |
| Propagation delay at 5 VDC | 5.5 ns min, 8 ns typ, 12.5 ns max; TA=25°C |
| Propagation delay at 3.3 VDC | 6.5 ns min, 9 ns typ, 13.5 ns max; TA=25°C |
| Pulse width distortion at 5 VDC | 0.3 ns typ, 3.0 ns max; tpHL vs tpLH maximum difference |
| Pulse width distortion at 3.3 VDC | 0.4 ns typ, 3.0 ns max; tpHL vs tpLH maximum difference |
| Part-to-part propagation delay skew | 2 ns max; 5 VDC or 3.3 VDC, same temperature, load, and voltage |
| Channel-to-channel propagation delay skew at 5 VDC | 0 ns min, 1.8 ns max; within one device |
| Channel-to-channel propagation delay skew at 3.3 VDC | 0 ns min, 2 ns max; within one device |
| Output rise/fall time | 1.5 ns; see timing waveform |
| Dynamic input current per channel at 5 VDC | 9 uA/Mbps; CL=0 pF, 50% duty-cycle square wave |
| Dynamic output current per channel at 5 VDC | 38 uA/Mbps; CL=0 pF, 50% duty-cycle square wave |
| Dynamic input current per channel at 3.3 VDC | 5 uA/Mbps; CL=0 pF, 50% duty-cycle square wave |
| Dynamic output current per channel at 3.3 VDC | 23 uA/Mbps; CL=0 pF, 50% duty-cycle square wave |
| Common-mode transient immunity | 75 kV/us typ; VIN=VDDx or 0 V, VCM=1000 V |
| Jitter | 120 ps p-p, 20 ps rms; jitter test section |
| ESD rating | +/-8 kV; HBM human body model |
| Input high threshold | 0.6*VDDx V min, 0.7*VDDx V max; VDD1=VDD2=3.3 V +/-10% or 5 V +/-10%, TA=25°C |
| Input low threshold | 0.3*VDDx V min, 0.4*VDDx V max; VDD1=VDD2=3.3 V +/-10% or 5 V +/-10%, TA=25°C |
| High-level output voltage at -20 uA | VDDx - 0.1 V min, VDDx V typ |
| High-level output voltage at -2 mA | VDDx - 0.2 V min, VDDx - 0.1 V typ |
| Low-level output voltage at 20 uA | 0 V min, 0.1 V typ |
| Low-level output voltage at 2 mA | 0.1 V min, 0.2 V typ |
| Input current per channel | -10 uA min, 0.5 uA typ, 10 uA max; 0 V <= signal voltage <= VDDx |
| UVLO rising threshold | 2.45 V min, 2.75 V typ, 2.95 V max; VDDxUV+ |
| UVLO falling threshold | 2.30 V min, 2.60 V typ, 2.75 V max; VDDxUV- |
| UVLO hysteresis | 0.15 V; VDDxUVH |
| Quiescent supply current at 5 VDC, input high | 0.42 mA min, 0.52 mA typ, 0.68 mA max; IDD1 or IDD2 |
| Quiescent supply current at 5 VDC, input low | 0.44 mA min, 0.55 mA typ, 0.71 mA max; IDD1 or IDD2 |
| Quiescent supply current at 3.3 VDC, input high | 0.41 mA min, 0.52 mA typ, 0.67 mA max; IDD1 or IDD2 |
| Quiescent supply current at 3.3 VDC, input low | 0.41 mA min, 0.51 mA typ, 0.66 mA max; IDD1 or IDD2 |
| Total supply current at 5 VDC, 150 kbps | 0.54 mA typ, 0.81 mA max; CL=0 pF, IDD1 or IDD2 |
| Total supply current at 5 VDC, 1 Mbps | 0.58 mA typ, 0.86 mA max; CL=0 pF, IDD1 or IDD2 |
| Total supply current at 5 VDC, 10 Mbps | 0.97 mA typ, 1.60 mA max; CL=0 pF, IDD1 or IDD2 |
| Total supply current at 3.3 VDC, 150 kbps | 0.52 mA typ, 0.78 mA max; CL=0 pF, IDD1 or IDD2 |
| Total supply current at 3.3 VDC, 1 Mbps | 0.54 mA typ, 0.81 mA max; CL=0 pF, IDD1 or IDD2 |
| Total supply current at 3.3 VDC, 10 Mbps | 0.77 mA typ, 1.20 mA max; CL=0 pF, IDD1 or IDD2 |
| Rated insulation voltage | 3000 V rms; duration 1 minute |
| Minimum external clearance | >=4 mm; shortest air distance input to output |
| Minimum creepage distance | >=4 mm; shortest package surface path input to output |
| Minimum internal clearance | >=11 um; insulation distance |
| Comparative tracking index | >400 V; DIN EN 60112 (VDE 0303-11):2010-05 |
| Material group | II; IEC 60112:2003 + A1:2009 |
| Input-to-output resistance | 1e11 ohm; all VDD1-side pins shorted and all VDD2-side pins shorted |
| Input-to-output capacitance | 1.5 pF; f=1 MHz |
| Input capacitance | 3 pF; f=1 MHz |
| Junction-to-air thermal resistance | 100 °C/W; thermocouple at package bottom center |
| Maximum repetitive peak isolation voltage | 565 Vpeak; VIORM, DIN V VDE V 0884-11 |
| Input-to-output test voltage | 848 Vpeak; method b1, VIORM x 1.5, tini=tm=1 s, partial discharge <5 pC |
| Maximum transient isolation voltage | 4200 Vpeak; VIOTM |
| Basic insulation surge voltage | 3615 Vpeak; VIOSM, 1.2/50 us combination wave |
| Maximum safety temperature | 150 °C; DIN V VDE V 0884-11 safety limit |
| Maximum safety dissipated power | 1.25 W; at 25°C |
| Insulation resistance at safety temperature | >1e9 ohm; VIO=500 V |
| Recommended bypass capacitance | 0.1 to 10 uF; between VDD1-GND1 and VDD2-GND2, placed close to isolator |
| Optional input/output series resistance | 50 to 300 ohm; for noisy systems or enhanced ESD immunity |
| Datasheet Status | request_only |
Product Overview
16605-01XE is an STMicroelectronics dual-channel digital isolator for Signal_Chain designs. The device has two channels arranged with one VDD1-side input and one VDD2-side input, supporting bidirectional isolation across the two sides while maintaining a default high output level for the V62/16605-01XE ordering option.
The device is specified for a recommended VDDx range of 3.0 to 5.5 V, with input high levels from 0.7VDDx to VDDx and input low levels from 0 to 0.3VDDx. Timing specifications include a 10 Mbps maximum data rate, 100 ns minimum pulse width, and propagation delay of 8 ns typical at 5 VDC or 9 ns typical at 3.3 VDC at TA=25°C.
Isolation and safety-related parameters include a 3 kV rms isolation voltage rating, 3000 V rms rated insulation voltage for 1 minute, at least 4 mm external clearance and creepage distance, 565 Vpeak maximum repetitive peak isolation voltage, and 4200 Vpeak maximum transient isolation voltage. The SOP-8 package uses a pad pattern of C1=5.40 mm, E=1.27 mm, X1=0.60 mm, and Y1=1.55 mm. Assembly guidance includes 0.1 to 10 uF bypass capacitors close to both VDD-GND pairs and optional 50 to 300 ohm series resistance for noisy systems or enhanced ESD immunity.
Key Features
- Dual-channel digital isolation with one channel each direction
- Default high output level for V62/16605-01XE ordering option
- 3 kV rms isolation voltage rating
- 3.0 to 5.5 V recommended supply range
- 10 Mbps maximum data rate with 100 ns minimum pulse width
- 8 ns typical propagation delay at 5 VDC
- 9 ns typical propagation delay at 3.3 VDC
- 75 kV/us typical common-mode transient immunity
- 120 ps p-p and 20 ps rms jitter
- SOP-8 package with specified C1, E, X1, and Y1 pad pattern
- 0.1 to 10 uF bypass capacitance recommended near supplies
- Optional 50 to 300 ohm series resistance for noisy systems
Typical Applications
- Isolated digital signal-chain interfaces
- Bidirectional logic isolation
- 3.3 V and 5 V isolated links
- Noise-sensitive digital communication paths
- Systems needing 3 kV rms isolation
- Fast isolated control signals
- Compact SOP-8 isolation layouts
Procurement Notes
When requesting a quote for 16605-01XE, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What type of device is 16605-01XE?
16605-01XE is a dual-channel digital isolator from STMicroelectronics in the Signal_Chain category. It has two channels arranged as one channel in each direction, with one VDD1-side input and one VDD2-side input.
What supply voltage range is recommended for this isolator?
The recommended operating supply voltage is 3.0 to 5.5 V for VDDx. The absolute maximum supply rating is -0.5 to +7.0 V for VDD1-GND1 and VDD2-GND2 at TA=25°C.
What timing performance is specified for 16605-01XE?
The device is specified for a 10 Mbps maximum data rate and 100 ns minimum pulse width. Propagation delay is 8 ns typical at 5 VDC and 9 ns typical at 3.3 VDC, both at TA=25°C.
What isolation ratings are listed in the datasheet facts?
The ordering table lists a 3 kV rms isolation voltage rating. Additional insulation data includes 3000 V rms rated insulation for 1 minute, 565 Vpeak maximum repetitive peak isolation voltage, and 4200 Vpeak maximum transient isolation voltage.
What layout guidance is provided for the power pins?
The datasheet facts recommend 0.1 to 10 uF bypass capacitance between VDD1-GND1 and VDD2-GND2, placed close to the isolator. Optional 50 to 300 ohm input or output series resistance is noted for noisy systems or enhanced ESD immunity.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: August 17, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.