Specifications
| Type | Description |
|---|---|
| Part Number | CDCEL913 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | PW TSSOP-14, 5 mm x 6.4 mm |
| Component Type | Other |
| Number of PLLs | 1 PLL |
| Number of Outputs | 3 outputs |
| Output Frequency Range | Up to 230 MHz |
| External Crystal Input Frequency | 8 MHz to 32 MHz |
| LVCMOS Clock Input Frequency | Up to 160 MHz |
| VCXO Pull Range | ±150 ppm |
| Period Jitter | 50 ps typical |
| Device Supply Voltage | 1.7 V min, 1.8 V nom, 1.9 V max |
| Output Supply Voltage, CDCEL913 | 1.7 V min, 1.9 V max |
| Output Supply Voltage, CDCE913 | 2.3 V min, 3.6 V max |
| Operating Free-Air Temperature | -40°C to 85°C |
| Low-Level Input Voltage | 0.3 x VDD max |
| High-Level Input Voltage | 0.7 x VDD min |
| Input Voltage Threshold | 0.5 x VDD |
| S0 Input Voltage Range | 0 V to 1.9 V |
| S1/S2/SDA/SCL Input Voltage Range | 0 V to 3.6 V |
| CLK Input Voltage Range | 0 V to 1.9 V |
| Output Current at 3.3 V | ±12 mA |
| Output Current at 2.5 V | ±10 mA |
| Output Current at 1.8 V | ±8 mA |
| LVCMOS Output Load | 15 pF |
| Crystal Input Frequency Range | 8 MHz min, 27 MHz nom, 32 MHz max |
| Crystal ESR | 100 ohm max |
| VCXO Pulling Range | ±120 ppm min, ±150 ppm typ |
| Frequency Control Voltage | 0 V to VDD |
| Pullability Ratio | 220 |
| On-Chip Load Capacitance | 0 pF to 20 pF |
| Absolute Maximum VDD | -0.5 V to 2.5 V |
| Absolute Maximum VDDOUT, CDCE913 | -0.5 V to 3.6 V + 0.5 V |
| Input Current Absolute Maximum | 20 mA |
| Continuous Output Current Absolute Maximum | 50 mA |
| Maximum Junction Temperature | 125°C |
| Storage Temperature | -65°C to 150°C |
| ESD HBM Rating | ±2000 V |
| ESD CDM Rating | ±1500 V |
| Junction-to-Ambient Thermal Resistance | 106°C/W |
| Junction-to-Case Top Thermal Resistance | 1.4°C/W |
| Supply Current | 11 mA |
| Supply Current per PLL | 9 mA |
| Output Supply Current at 3.3 V | 1.3 mA |
| Output Supply Current at 1.8 V | 0.7 mA |
| Power-Down Current | 30 µA |
| Power-Up Control Threshold | 0.85 V min, 1.45 V max |
| PLL VCO Frequency Range | 80 MHz to 230 MHz |
| LVCMOS Output Frequency at 3.3 V | 230 MHz max |
| LVCMOS Output Frequency at 1.8 V | 230 MHz max |
| LVCMOS Input Clamp Voltage | -1.2 V |
| LVCMOS Input Current | ±5 µA |
| S0/S1/S2 High Input Current | 5 µA |
| S0/S1/S2 Low Input Current | -4 µA |
| Xin/CLK Input Capacitance | 6 pF |
| Xout Input Capacitance | 2 pF |
| S0/S1/S2 Input Capacitance | 3 pF |
| CDCEL913 High-Level Output Voltage, IOH=-0.1 mA | 1.6 V min |
| CDCEL913 High-Level Output Voltage, IOH=-4 mA | 1.4 V min |
| CDCEL913 High-Level Output Voltage, IOH=-8 mA | 1.1 V min |
| Datasheet Status | request_only |
Product Overview
CDCEL913 is a Texas Instruments programmable LVCMOS clock generator in the Signal_Chain category. It is part of the CDCE913/CDCEL913 family with 1 PLL and 3 outputs, supporting output clock frequencies up to 230 MHz through the integrated configurable PLL.
The device supports flexible input clocking with an external crystal input from 8 MHz to 32 MHz and a single-ended LVCMOS clock input up to 160 MHz. Its on-chip VCXO function provides ±150 ppm typical pull range, with recommended VCXO pulling range of ±120 ppm minimum and ±150 ppm typical over a 0 V to 1.8 V control range, depending on the crystal and capacitance.
For assembly and operating limits, CDCEL913 uses the PW TSSOP-14, 5 mm x 6.4 mm package. Recommended operating conditions include 1.7 V to 1.9 V VDD, 1.7 V to 1.9 V VDDOUT for CDCEL913, 15 pF LVCMOS output load, and -40°C to 85°C free-air temperature operation.
Key Features
- 1 PLL with 3 programmable LVCMOS clock outputs
- Output clock frequency supports up to 230 MHz
- External crystal input supports 8 MHz to 32 MHz
- Single-ended LVCMOS input supports up to 160 MHz
- On-chip VCXO supports ±150 ppm typical pull range
- Low-noise PLL core has 50 ps typical period jitter
- CDCEL913 output supply operates from 1.7 V to 1.9 V
- Recommended free-air operation spans -40°C to 85°C
- PW TSSOP-14 package measures 5 mm x 6.4 mm
- Integrated load capacitance adjustable from 0 pF to 20 pF
Typical Applications
- Programmable LVCMOS clock generation
- Three-output clock distribution
- Crystal-referenced timing circuits
- VCXO frequency control designs
- 1.8 V output clock systems
- Low-jitter PLL clock generation
- Signal-chain timing support
Procurement Notes
When requesting a quote for CDCEL913, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
How many PLLs and outputs does CDCEL913 provide?
CDCEL913 is part of the CDCE913/CDCEL913 family member specified with 1 PLL and 3 outputs. The integrated configurable PLL supports output clock frequencies up to 230 MHz.
What input clock sources are supported by CDCEL913?
The device supports an external crystal input frequency from 8 MHz to 32 MHz. It also supports a single-ended LVCMOS clock input up to 160 MHz for flexible input clocking.
What supply range is recommended for CDCEL913 outputs?
For CDCEL913, the recommended output supply voltage VDDOUT is 1.7 V minimum to 1.9 V maximum. The device supply VDD is specified at 1.7 V minimum, 1.8 V nominal, and 1.9 V maximum.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.