Specifications
| Type | Description |
|---|---|
| Part Number | DAC60501 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | DGS 10-pin VSSOP; DQF 8-pin WSON |
| Resolution | 12 bits; condition: DAC60501 device |
| Integral Nonlinearity (INL) | -1 to 1 LSB; condition: TA=-40°C to +125°C, 2.7 V <= VDD <= 5.5 V |
| Differential Nonlinearity (DNL) | -1 to 1 LSB; condition: TA=-40°C to +125°C, 2.7 V <= VDD <= 5.5 V |
| Total Unadjusted Error (TUE) | -0.1%FSR min, 0.04%FSR typ, 0.1%FSR max; condition: DAC70501, DAC60501 |
| Zero Code Error | -1.5 mV min, 0.5 mV typ, 1.5 mV max; condition: DAC loaded with zero scale code |
| Zero Code Error Temperature Coefficient | ±2 µV/°C; condition: TA=-40°C to +125°C |
| Offset Error | -1.5 mV min, 0.5 mV typ, 1.5 mV max; condition: TA=-40°C to +125°C |
| Supply Voltage | 2.7 V min, 5.5 V max; condition: VDD to AGND recommended operating condition |
| Input High Voltage | 1.62 V min; condition: digital inputs |
| Input Low Voltage | 0.45 V max; condition: digital inputs |
| Reference Input Voltage | 1.2 V min, 0.5 x (VDD - 0.2) V max; condition: 2.7 V <= VDD < 3.3 V, reference divider disabled (REF-DIV bit = 0) |
| Reference Input Voltage | 2.4 V min, VDD - 0.2 V max; condition: 2.7 V <= VDD < 3.3 V, reference divider enabled (REF-DIV bit = 1) |
| Reference Input Voltage | 1.2 V min, 0.5 x VDD max; condition: 3.3 V <= VDD <= 5.5 V, reference divider disabled (REF-DIV bit = 0) |
| Reference Input Voltage | 2.4 V min, VDD max; condition: 3.3 V <= VDD <= 5.5 V, reference divider enabled (REF-DIV bit = 1) |
| Operating Temperature | -40°C min, 125°C max; condition: free-air temperature range |
| Internal Reference Voltage | 2.5 V; condition: integrated precision internal reference |
| Internal Reference Temperature Drift | 5 ppm/°C max; condition: integrated precision internal reference |
| Buffered Output Range | 1.25 V, 2.5 V, or 5 V; condition: using internal reference and selectable output ranges |
| Supply Current | 1 mA; condition: at VDD=5.5 V |
| Power-Down Current | 15 µA typ; condition: at 5 V |
| SPI Clock Rate | Up to 50 MHz; condition: SPI-compatible 3-wire serial interface |
| I2C Standard Mode Data Rate | 100 kbps; condition: I2C mode |
| I2C Fast Mode Data Rate | 400 kbps; condition: I2C mode |
| I2C Fast Mode Plus Data Rate | 1.0 Mbps; condition: I2C mode |
| Glitch Energy | 4 nV-s; condition: low glitch energy specification |
| Power-On Reset Option | Zero scale; condition: DAC60501Z |
| Power-On Reset Option | Midscale; condition: DAC60501M |
| Reference Configuration | Internal default or external; condition: DAC60501Z and DAC60501M |
| VDD Absolute Maximum Rating | -0.3 V min, 6 V max; condition: VDD to AGND |
| VREFIO Absolute Maximum Rating | -0.3 V min, VDD + 0.3 V max; condition: VREFIO to AGND |
| Digital Input Absolute Maximum Rating | -0.3 V min, VDD + 0.3 V max; condition: digital inputs to AGND |
| VOUT Absolute Maximum Rating | -0.3 V min, VDD + 0.3 V max; condition: VOUT to AGND |
| Digital Pin Input Current Absolute Maximum | -10 mA min, 10 mA max; condition: current into any digital pins |
| VDD/AGND/VOUT Input Current Absolute Maximum | -30 mA min, 30 mA max; condition: current into VDD, AGND, VOUT |
| VREFIO Input Current Absolute Maximum | -100 mA min, 100 mA max; condition: current into VREFIO |
| Junction Temperature Absolute Maximum | -40°C min, 150°C max; condition: TJ |
| Storage Temperature | -65°C min, 150°C max; condition: Tstg |
| ESD Human Body Model | ±2000 V; condition: per ANSI/ESDA/JEDEC JS-001, all pins |
| ESD Charged Device Model | ±1000 V; condition: per JEDEC JESD22-C101, all pins |
| Junction-to-Ambient Thermal Resistance | 170.1°C/W; condition: DGS 10-pin VSSOP package |
| Junction-to-Ambient Thermal Resistance | 122.6°C/W; condition: DQF 8-pin WSON package |
| Junction-to-Case Top Thermal Resistance | 60.5°C/W; condition: DGS 10-pin VSSOP package |
| Junction-to-Case Top Thermal Resistance | 58.3°C/W; condition: DQF 8-pin WSON package |
| Junction-to-Board Thermal Resistance | 92.6°C/W; condition: DGS 10-pin VSSOP package |
| Junction-to-Board Thermal Resistance | 50°C/W; condition: DQF 8-pin WSON package |
| Junction-to-Top Characterization Parameter | 7.8°C/W; condition: DGS 10-pin VSSOP package |
| Junction-to-Top Characterization Parameter | 1.5°C/W; condition: DQF 8-pin WSON package |
| Junction-to-Board Characterization Parameter | 90.7°C/W; condition: DGS 10-pin VSSOP package |
| Junction-to-Board Characterization Parameter | 49.8°C/W; condition: DQF 8-pin WSON package |
| Datasheet Status | request_only |
Product Overview
The DAC60501 is a Texas Instruments 12-bit voltage-output DAC in the Signal_Chain category. The extracted device data specifies 12-bit resolution, INL of -1 to 1 LSB, DNL of -1 to 1 LSB, and total unadjusted error of -0.1%FSR minimum, 0.04%FSR typical, and 0.1%FSR maximum for DAC70501 and DAC60501 conditions.
The device operates from a 2.7 V to 5.5 V recommended VDD range and supports a -40°C to 125°C free-air operating range. It integrates a 2.5 V precision internal reference with 5 ppm/°C maximum temperature drift, while also supporting internal-default or external reference configuration for DAC60501Z and DAC60501M variants.
Available package options are DGS 10-pin VSSOP and DQF 8-pin WSON. Thermal data is provided for both packages, including junction-to-ambient resistance of 170.1°C/W for DGS and 122.6°C/W for DQF. Digital connectivity includes SPI-compatible 3-wire operation up to 50 MHz and I2C standard, fast, and fast mode plus data rates.
Key Features
- 12-bit voltage-output DAC resolution
- INL specified from -1 to 1 LSB
- DNL specified from -1 to 1 LSB
- 2.7 V to 5.5 V recommended supply range
- Integrated 2.5 V internal reference
- Internal reference drift up to 5 ppm/°C
- Selectable 1.25 V, 2.5 V, or 5 V output ranges
- SPI-compatible 3-wire interface up to 50 MHz
- I2C supports 100 kbps, 400 kbps, and 1.0 Mbps
- 15 µA typical power-down current at 5 V
Typical Applications
- Voltage-output signal-chain control
- SPI-controlled analog output nodes
- I2C-controlled analog output nodes
- Programmable reference voltage generation
- Low-power DAC output stages
- Wide-temperature analog control circuits
- Reset-defined DAC output systems
Procurement Notes
When requesting a quote for DAC60501, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What resolution does the DAC60501 provide?
The DAC60501 is specified as a 12-bit voltage-output DAC. Its extracted electrical data also lists integral nonlinearity and differential nonlinearity from -1 to 1 LSB over -40°C to +125°C and 2.7 V to 5.5 V.
What supply voltage range is recommended for DAC60501?
The recommended VDD operating condition for DAC60501 is 2.7 V minimum to 5.5 V maximum, measured from VDD to AGND. Absolute maximum VDD is listed separately as -0.3 V to 6 V.
Which digital interfaces are specified for DAC60501?
The extracted facts specify a SPI-compatible 3-wire serial interface with clock rate up to 50 MHz. I2C mode data rates are also listed: 100 kbps standard mode, 400 kbps fast mode, and 1.0 Mbps fast mode plus.
What package options are listed for DAC60501?
The package information lists DGS 10-pin VSSOP and DQF 8-pin WSON options. Thermal data is provided for both packages, including junction-to-ambient, junction-to-case top, junction-to-board, and characterization parameters.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.