Specifications
| Type | Description |
|---|---|
| Part Number | DP83869HM |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | RGZ VQFN, 48-pin, 7 mm x 7 mm |
| Supported Copper Ethernet Protocols | 10BASE-Te, 100BASE-TX, 1000BASE-T |
| Copper Protocol Condition | Copper interface operation |
| Supported Fiber Ethernet Protocols | 1000BASE-X, 100BASE-FX |
| Fiber Protocol Condition | Fiber interface operation |
| MAC Interfaces | SGMII, RGMII, MII |
| MAC Interface Condition | MAC layer interface |
| Bridge Mode Support | Yes |
| Bridge Mode Condition | RGMII-to-SGMII and SGMII-to-RGMII bridge conversion |
| Media Conversion Support | 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX |
| Media Conversion Condition | Unmanaged media conversion mode |
| Maximum Ambient Temperature | 125°C |
| Maximum Ambient Temperature Condition | High temperature device grade |
| Operating Temperature Range | -40°C to +125°C |
| Operating Temperature Condition | DP83869HM temperature grade |
| ESD Immunity | >8 kV |
| ESD Immunity Condition | IEC 61000-4-2 direct contact |
| Power Consumption in 1000BASE-X | <150 mW |
| Power Consumption in 1000BASE-T | <500 mW |
| Total Latency in 1000BASE-T | ≤384 ns |
| Total Latency in 100BASE-TX | ≤361 ns |
| Synchronized Clock Output Frequencies | 25 MHz and 125 MHz |
| Synchronized Clock Output Condition | Selectable synchronized clock output |
| Reference Clock Input | 25 MHz |
| Reference Clock Input Condition | Crystal or oscillator input on XI/XO |
| RGMII Transmit Clock Frequency | 125 MHz |
| RGMII Transmit Clock Condition | 1000 Mbps RGMII mode, GTX_CLK input |
| MII Transmit Clock Frequency at 100 Mbps | 25 MHz |
| MII Transmit Clock 100 Mbps Condition | 100 Mbps MII mode, TX_CLK output |
| MII Transmit Clock Frequency at 10 Mbps | 2.5 MHz |
| MII Transmit Clock 10 Mbps Condition | 10 Mbps MII mode, TX_CLK output |
| RGMII Receive Clock Frequency | 125 MHz |
| RGMII Receive Clock Condition | 1000 Mbps RGMII mode, RX_CLK output |
| Digital Supply Voltage | 1.1 V ±10% |
| Digital Supply Voltage Condition | VDD1P1 pins |
| Analog Supply Voltage | 2.5 V ±5% |
| Analog Supply Voltage Condition | VDDA2P5 pins |
| Optional Analog Supply Voltage | 1.8 V ±5% |
| Optional Analog Supply Voltage Condition | VDDA1P8 pins in three-supply mode |
| I/O Supply Voltage | 1.8 V ±5%, 2.5 V ±5%, or 3.3 V ±5% |
| I/O Supply Voltage Condition | VDDIO pins |
| Bias Resistor | 11 kΩ ±1% |
| Bias Resistor Condition | RBIAS to GND |
| Supply Decoupling Requirement | 1 µF and 0.1 µF capacitor to GND per supply pin |
| Supply Decoupling Condition | VDDA2P5, VDD1P1, VDDA1P8 when externally supplied, and VDDIO pins |
| SGMII/Fiber Data Coupling Capacitor | 0.1 µF |
| SGMII/Fiber Data Coupling Condition | AC coupling on SON, SOP, SIP, and SIN differential data pins |
| Fiber Signal Detect Polarity | Active low |
| Fiber Signal Detect Polarity Condition | JTAG_TDI/SD pin in 1000BASE-X and 100BASE-FX mode |
| Jumbo Frame Support | Supported |
| Jumbo Frame Support Condition | 1000M and 100M speeds |
| Time Sensitive Networking Compliance | TSN compliant |
| TSN Compliance Condition | Ethernet PHY operation |
| IEEE 1588 Support | Sync Frame Detect indications using SFD |
| IEEE 1588 Condition | Time synchronization support to MAC |
| Wake on LAN | Supported |
| Wake on LAN Condition | PHY feature set |
| Datasheet Status | request_only |
Product Overview
The DP83869HM is a Texas Instruments Signal_Chain Ethernet PHY transceiver for copper and fiber Ethernet interfaces. Copper operation covers 10BASE-Te, 100BASE-TX, and 1000BASE-T, while fiber operation covers 1000BASE-X and 100BASE-FX. The MAC interface can be implemented through SGMII, RGMII, or MII.
The device supports RGMII-to-SGMII and SGMII-to-RGMII bridge conversion, plus unmanaged 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX media conversion. Timing-related facts include selectable 25 MHz and 125 MHz synchronized clock outputs, a 25 MHz XI/XO reference clock input, 125 MHz RGMII transmit and receive clocks at 1000 Mbps, and MII transmit clocks of 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps.
The package is RGZ VQFN, 48-pin, 7 mm x 7 mm. Supply requirements include 1.1 V ±10% digital supply, 2.5 V ±5% analog supply, optional 1.8 V ±5% analog supply in three-supply mode, and 1.8 V, 2.5 V, or 3.3 V ±5% I/O supply options. Assembly-related requirements include 1 µF and 0.1 µF decoupling per supply pin, an 11 kΩ ±1% RBIAS resistor to GND, and 0.1 µF AC coupling on SGMII/fiber differential data pins.
Key Features
- Supports 10BASE-Te, 100BASE-TX, and 1000BASE-T copper Ethernet
- Supports 1000BASE-X and 100BASE-FX fiber Ethernet operation
- SGMII, RGMII, and MII MAC interface options
- RGMII-to-SGMII and SGMII-to-RGMII bridge conversion
- Unmanaged fiber-to-copper media conversion modes
- -40°C to +125°C DP83869HM operating temperature range
- IEC 61000-4-2 direct-contact ESD immunity above 8 kV
- Less than 150 mW power in 1000BASE-X operation
- Less than 500 mW power in 1000BASE-T operation
- TSN compliant with IEEE 1588 Sync Frame Detect indications
- Wake on LAN and jumbo frame support
- Selectable 25 MHz and 125 MHz synchronized clock output
Typical Applications
- Copper Ethernet PHY interfaces
- Fiber Ethernet PHY interfaces
- RGMII-to-SGMII bridge conversion
- SGMII-to-RGMII bridge conversion
- 1000BASE-X to 1000BASE-T media conversion
- 100BASE-FX to 100BASE-TX media conversion
- TSN Ethernet PHY designs
- IEEE 1588 time synchronization interfaces
- Wake on LAN PHY implementations
Procurement Notes
When requesting a quote for DP83869HM, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What Ethernet protocols does the DP83869HM support?
For copper interface operation, DP83869HM supports 10BASE-Te, 100BASE-TX, and 1000BASE-T. For fiber interface operation, it supports 1000BASE-X and 100BASE-FX.
Which MAC interfaces are available on DP83869HM?
The MAC layer interface options listed for DP83869HM are SGMII, RGMII, and MII. The device also supports RGMII-to-SGMII and SGMII-to-RGMII bridge conversion.
What supply voltages are specified for DP83869HM?
DP83869HM uses 1.1 V ±10% on VDD1P1, 2.5 V ±5% on VDDA2P5, optional 1.8 V ±5% on VDDA1P8 in three-supply mode, and VDDIO at 1.8 V, 2.5 V, or 3.3 V ±5%.
What package is used for DP83869HM?
DP83869HM is specified in an RGZ VQFN package with 48 pins and 7 mm x 7 mm body size. The listed bias and decoupling requirements include 11 kΩ ±1% RBIAS and 1 µF plus 0.1 µF per supply pin.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.