Specifications
| Type | Description |
|---|---|
| Part Number | OP07CP |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package Case | D SOIC-8 4.90 mm x 3.91 mm; P PDIP-8 9.81 mm x 6.35 mm; PS SO-8 6.20 mm x 5.30 mm |
| Supply Voltage Range | ±3 V to ±18 V; recommended operating conditions, dual supply |
| Supply Voltage Range | 6 V to 36 V; recommended operating conditions, single supply |
| Absolute Maximum Supply Voltage | 44 V; single supply |
| Absolute Maximum Supply Voltage | ±22 V; dual supply |
| Absolute Maximum Differential Input Voltage | ±30 V; IN+ with respect to IN- |
| Absolute Maximum Single-Ended Input Voltage | ±22 V; magnitude must not exceed supply voltage magnitude or 15 V, whichever is less |
| Output Short-Circuit Rating | Continuous; output shorted to ground or negative power supply |
| Operating Junction Temperature | -55°C to 150°C; absolute maximum ratings |
| Storage Temperature | -65°C to 150°C; absolute maximum ratings |
| ESD Rating HBM | ±1000 V; ANSI/ESDA/JEDEC JS-001 |
| ESD Rating CDM | ±1000 V; JEDEC JESD22-C101 |
| Common-Mode Input Voltage | -13 V to 13 V; VS = ±15 V, recommended operating conditions |
| Operating Ambient Temperature | 0°C to 70°C; recommended operating conditions |
| Junction-to-Ambient Thermal Resistance | 127.6°C/W; D SOIC-8 package |
| Junction-to-Ambient Thermal Resistance | 85°C/W; P PDIP-8 package |
| Junction-to-Case Top Thermal Resistance | 67.1°C/W; D SOIC-8 package |
| Junction-to-Case Top Thermal Resistance | 68.6°C/W; P PDIP-8 package |
| Input Offset Voltage | ±60 µV typ, ±85 µV max; OP07C, TA = 0°C to 70°C, TA = 25°C/Vs = ±15 V/RL = 2 kΩ unless otherwise noted |
| Input Offset Voltage | ±150 µV typ, ±250 µV max; OP07D, TA = 0°C to 70°C, TA = 25°C/Vs = ±15 V/RL = 2 kΩ unless otherwise noted |
| Input Offset Voltage Drift | ±0.5 µV/°C; OP07C, TA = 0°C to 70°C |
| Input Offset Voltage Drift | ±2.5 µV/°C; OP07D, TA = 0°C to 70°C |
| Long-Term Input Offset Voltage Drift | ±0.4 µV/month; engineering estimate after first 30 days of operation |
| Offset Adjustment Range | ±4 mV; RS = 20 kΩ |
| Power Supply Rejection Ratio | 7 µV/V typ, 32 µV/V max; VS = ±3 V to ±18 V |
| Power Supply Rejection Ratio | 10 µV/V typ, 51 µV/V max; VS = ±3 V to ±18 V, TA = 0°C to 70°C |
| Input Bias Current | ±1.8 nA typ, ±2.2 nA max; OP07C, TA = 0°C to 70°C |
| Input Bias Current | ±12 nA typ, ±14 nA max; OP07D, TA = 0°C to 70°C |
| Input Bias Current Drift | ±18 pA/°C; OP07C |
| Input Bias Current Drift | ±50 pA/°C; OP07D |
| Input Offset Current | ±0.8 nA typ, ±1.6 nA max; OP07C, TA = 0°C to 70°C |
| Input Offset Current | ±6 nA typ, ±8 nA max; OP07D, TA = 0°C to 70°C |
| Input Offset Current Drift | 12 pA/°C; OP07C |
| Input Offset Current Drift | ±50 pA/°C; OP07D |
| Input Voltage Noise | 0.38 µVPP; f = 0.1 Hz to 10 Hz |
| Input Voltage Noise Density | 10.5 nV/√Hz; f = 10 Hz |
| Input Voltage Noise Density | 10.2 nV/√Hz; f = 100 Hz |
| Input Voltage Noise Density | 9.8 nV/√Hz; f = 1 kHz |
| Input Current Noise | 15 pApp; f = 0.1 Hz to 10 Hz |
| Input Current Noise Density | 0.35 pA/√Hz; f = 10 Hz |
| Input Current Noise Density | 0.15 pA/√Hz; f = 100 Hz |
| Input Current Noise Density | 0.13 pA/√Hz; f = 1 kHz |
| Common-Mode Voltage | ±13 V min, ±14 V typ; TA = 25°C, VS = ±15 V |
| Common-Mode Voltage | ±13 V min, ±13.5 V typ; TA = 0°C to 70°C, VS = ±15 V |
| Common-Mode Rejection Ratio | 100 dB min, 120 dB typ; OP07C, VCM = ±13 V |
| Common-Mode Rejection Ratio | 97 dB min, 120 dB typ; OP07C, VCM = ±13 V, TA = 0°C to 70°C |
| Common-Mode Rejection Ratio | 94 dB min, 110 dB typ; OP07D, VCM = ±13 V |
| Common-Mode Rejection Ratio | 94 dB min, 106 dB typ; OP07D, VCM = ±13 V, TA = 0°C to 70°C |
| Input Resistance | 7 MΩ min, 33 MΩ typ; TA = 25°C, VS = ±15 V |
| Open-Loop Voltage Gain | 100 V/mV min, 400 V/mV typ; OP07C, 1.4 V < VO < 11.4 V, RL = 500 kΩ |
| Open-Loop Voltage Gain | 400 V/mV typ; OP07D, 1.4 V < VO < 11.4 V, RL = 500 kΩ |
| Open-Loop Voltage Gain | 120 V/mV min, 400 V/mV typ; VO = ±10 V |
| Open-Loop Voltage Gain | 100 V/mV min, 400 V/mV typ; VO = ±10 V, TA = -40°C to +125°C |
| Unity-Gain Bandwidth | 0.4 MHz min, 0.6 MHz typ; TA = 25°C, VS = ±15 V |
| Slew Rate | 0.3 V/µs typ; VS = 5 V, RL = 2 kΩ |
| Voltage Output Swing | ±11.5 V min, ±12.8 V typ; TA = 25°C, VS = ±15 V, RL = 2 kΩ connected to mid-supply |
| Voltage Output Swing | ±11 V min, ±12.6 V typ; TA = 0°C to 70°C, VS = ±15 V, RL = 2 kΩ connected to mid-supply |
| Voltage Output Swing | ±12 V min, ±13 V typ; RL = 10 kΩ, VS = ±15 V |
| Voltage Output Swing | ±12 V typ; RL = 1 kΩ, VS = ±15 V |
| Power Dissipation | 80 mW typ, 150 mW max; no load, VS = ±15 V unless otherwise noted |
| Power Dissipation | 4 mW typ, 8 mW max; VS = ±3 V, no load |
| Pin Count | 8 pins; D SOIC, P PDIP, and PS SO packages |
| Pin Functions | Pin 1 OFFSET N1, pin 2 IN-, pin 3 IN+, pin 4 V-, pin 5 NC, pin 6 OUT, pin 7 V+, pin 8 OFFSET N2; top view pin configuration |
| Datasheet Status | request_only |
Product Overview
The OP07CP is a Texas Instruments precision operational amplifier in the Signal_Chain category. It is specified for dual-supply operation from ±3 V to ±18 V or single-supply operation from 6 V to 36 V. Absolute maximum supply ratings are 44 V for single-supply use and ±22 V for dual-supply use, with ±30 V maximum differential input voltage between IN+ and IN-.
For OP07C-grade electrical performance, the datasheet lists input offset voltage at ±60 µV typical and ±85 µV maximum across 0°C to 70°C, with ±0.5 µV/°C input offset voltage drift. Noise specifications include 0.38 µVPP input voltage noise from 0.1 Hz to 10 Hz and 9.8 nV/√Hz input voltage noise density at 1 kHz. Dynamic parameters include 0.4 MHz minimum and 0.6 MHz typical unity-gain bandwidth, plus 0.3 V/µs typical slew rate at VS = 5 V and RL = 2 kΩ.
Package options listed for the family include D SOIC-8, P PDIP-8, and PS SO-8, all with 8 pins. The pinout provides OFFSET N1, IN-, IN+, V-, NC, OUT, V+, and OFFSET N2 connections. These parameters support precision signal conditioning, low-offset gain stages, sensor interfaces, and measurement circuits that require controlled offset, bias current, noise, and supply behavior.
Key Features
- ±3 V to ±18 V recommended dual-supply operation
- 6 V to 36 V recommended single-supply operation
- OP07C offset voltage: ±60 µV typical, ±85 µV maximum
- OP07C offset drift specified at ±0.5 µV/°C
- 0.38 µVPP input voltage noise from 0.1 Hz to 10 Hz
- 0.6 MHz typical unity-gain bandwidth at ±15 V
- 0.3 V/µs typical slew rate with 5 V supply
- Continuous output short-circuit rating to ground or negative supply
- 8-pin SOIC, PDIP, and SO package options
Typical Applications
- Precision signal conditioning
- Low-offset amplifier stages
- Sensor interface circuits
- Measurement front ends
- Bridge signal amplification
- Low-frequency noise-sensitive circuits
- Offset-trimmed analog gain stages
Procurement Notes
When requesting a quote for OP07CP, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What supply range does the OP07CP support?
The datasheet facts list recommended operation from ±3 V to ±18 V on a dual supply and 6 V to 36 V on a single supply. Absolute maximum supply ratings are 44 V single supply and ±22 V dual supply.
What input offset voltage is specified for OP07C performance?
For OP07C conditions over TA = 0°C to 70°C, with TA = 25°C, VS = ±15 V, and RL = 2 kΩ unless otherwise noted, input offset voltage is specified as ±60 µV typical and ±85 µV maximum.
Which package and pin count are listed for this device?
The package data lists D SOIC-8, P PDIP-8, and PS SO-8 options. The pin count is 8 pins, with functions including OFFSET N1, IN-, IN+, V-, NC, OUT, V+, and OFFSET N2.
What noise values are provided in the extracted datasheet facts?
Input voltage noise is listed as 0.38 µVPP from 0.1 Hz to 10 Hz. Voltage noise density is 10.5 nV/√Hz at 10 Hz, 10.2 nV/√Hz at 100 Hz, and 9.8 nV/√Hz at 1 kHz.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.