Specifications
| Type | Description |
|---|---|
| Part Number | SN74LVC1G126 |
| Manufacturer | Texas Instruments |
| Product Type | Operational Amplifier |
| Category | Signal Chain |
| Package / Case | SOT-23 (5) 2.90 mm x 1.60 mm; SC70 (5) 2.00 mm x 1.25 mm; SOT (5) 1.60 mm x 1.20 mm; SON (6) 1.00 mm x 1.00 mm; XBGA (5) 1.40 mm x 0.90 mm |
| Logic function | Single line driver/buffer with 3-state output; output disabled when output-enable input is low |
| VCC operating range | 1.65 to 3.6 V; description section |
| 5-V VCC support | Supported; feature list |
| Input voltage tolerance | Inputs accept voltages to 5.5 V; feature list |
| Down translation | Provides down translation to VCC; feature list |
| Maximum propagation delay | 3.7 ns; VCC=3.3 V, feature list |
| Low power consumption ICC | 10 uA max; feature list |
| Output drive current | +/-24 mA; VCC=3.3 V |
| Partial-power-down support | Ioff supports live insertion, partial-power-down mode, and back-drive protection; feature list |
| Latch-up performance | >100 mA; per JESD78 Class II |
| ESD HBM protection | 2000 V; JESD22 / ANSI/ESDA/JEDEC JS-001, all pins |
| ESD CDM protection | 1000 V; JEDEC JESD22-C101, all pins |
| Pin A | Pin 2; all listed packages; input pin |
| Pin OE | Pin 1; all listed packages; enable input |
| Pin Y | Pin 4; all listed packages; output pin |
| Pin GND | Pin 3; all listed packages; ground pin |
| Pin VCC | Pin 5 for DBV/DCK/DRL/YZP, pin 6 for DRY/DSF; power pin |
| Pin NC | Pin 5; DRY/DSF packages only; do not connect |
| Absolute maximum supply voltage range | -0.5 to 6.5 V; over operating free-air temperature range |
| Absolute maximum input voltage range | -0.5 to 6.5 V; input current ratings observed if exceeded below ground |
| Absolute maximum output voltage, high-Z or power-off | -0.5 to 6.5 V; output current ratings observed if exceeded below ground |
| Absolute maximum output voltage, high or low state | -0.5 to VCC + 0.5 V; output current ratings observed if exceeded below ground |
| Input clamp current | -50 mA; VI < 0 V |
| Output clamp current | -50 mA; VO < 0 V |
| Continuous output current | +/-50 mA; absolute maximum rating |
| Continuous current through VCC or GND | +/-100 mA; absolute maximum rating |
| Storage temperature range | -65 to 150 °C; absolute maximum rating |
| Recommended supply voltage | 1.65 to 5.5 V; operating |
| Data retention supply voltage | 1.5 V; data retention only |
| High-level input voltage VIH | 0.65 x VCC min; VCC=1.65 V to 1.95 V |
| High-level input voltage VIH | 1.7 V min; VCC=2.3 V to 2.7 V |
| High-level input voltage VIH | 2 V min; VCC=3 V to 3.6 V |
| High-level input voltage VIH | 0.7 x VCC min; VCC=4.5 V to 5.5 V |
| Low-level input voltage VIL | 0.35 x VCC max; VCC=1.65 V to 1.95 V |
| Low-level input voltage VIL | 0.7 V max; VCC=2.3 V to 2.7 V |
| Low-level input voltage VIL | 0.8 V max; VCC=3 V to 3.6 V |
| Low-level input voltage VIL | 0.3 x VCC max; VCC=4.5 V to 5.5 V |
| Recommended input voltage range | 0 to 5.5 V; recommended operating conditions |
| Recommended output voltage range | 0 to VCC V; recommended operating conditions |
| High-level output current IOH | -4 mA; VCC=1.65 V |
| High-level output current IOH | -8 mA; VCC=2.3 V |
| High-level output current IOH | -16 mA and -24 mA; VCC=3 V |
| High-level output current IOH | -32 mA; VCC=4.5 V |
| Low-level output current IOL | 4 mA; VCC=1.65 V |
| Low-level output current IOL | 8 mA; VCC=2.3 V |
| Low-level output current IOL | 16 mA and 24 mA; VCC=3 V |
| Low-level output current IOL | 32 mA; VCC=4.5 V |
| Input transition rise/fall rate | 20 ns/V max; VCC=1.8 V +/-0.15 V or 2.5 V +/-0.2 V |
| Input transition rise/fall rate | 10 ns/V max; VCC=3.3 V +/-0.3 V |
| Input transition rise/fall rate | 5 ns/V max; VCC=5 V +/-0.5 V |
| Operating free-air temperature | -40 to 125 °C; recommended operating conditions |
| Junction-to-ambient thermal resistance RthetaJA | 206 °C/W; DBV package, 5 pins |
| Junction-to-ambient thermal resistance RthetaJA | 252 °C/W; DCK package, 5 pins |
| Junction-to-ambient thermal resistance RthetaJA | 142 °C/W; DRL package, 5 pins |
| Junction-to-ambient thermal resistance RthetaJA | 234 °C/W; DRY package, 6 pins |
| Junction-to-ambient thermal resistance RthetaJA | 132 °C/W; YZP package, 5 pins |
| High-level output voltage VOH | VCC - 0.1 V min; IOH=-100 uA, VCC=1.65 V to 5.5 V, -40 °C to 85 °C and -40 °C to 125 °C |
| High-level output voltage VOH | 1.2 V min; IOH=-4 mA, VCC=1.65 V |
| High-level output voltage VOH | 1.9 V min; IOH=-8 mA, VCC=2.3 V |
| High-level output voltage VOH | 2.4 V min; IOH=-16 mA, VCC=3 V |
| High-level output voltage VOH | 2.3 V min; IOH=-24 mA, VCC=3 V |
| High-level output voltage VOH | 3.8 V min; IOH=-32 mA, VCC=4.5 V |
| Low-level output voltage VOL | 0.1 V max; IOL=100 uA, VCC=1.65 V to 5.5 V |
| Low-level output voltage VOL | 0.45 V max; IOL=4 mA, VCC=1.65 V |
| Low-level output voltage VOL | 0.3 V max; IOL=8 mA, VCC=2.3 V |
| Low-level output voltage VOL | 0.4 V max; IOL=16 mA, VCC=3 V |
| Low-level output voltage VOL | 0.55 V max; IOL=24 mA, VCC=3 V |
| Low-level output voltage VOL | 0.55 V max; IOL=32 mA, VCC=4.5 V |
| Input leakage current II | +/-5 uA max; A or OE inputs, VI=5.5 V or GND, VCC=0 to 5.5 V |
| Power-off leakage current Ioff | +/-10 uA max; VI or VO=5.5 V, VCC=0 V |
| High-impedance output leakage IOZ | 10 uA max; VO=0 to 5.5 V, VCC=3.6 V |
| Supply current ICC | 10 uA max; VI=5.5 V or GND, IO=0, VCC=1.65 V to 5.5 V |
| Delta supply current Delta ICC | 500 uA max; one input at VCC - 0.6 V, other inputs at VCC or GND, VCC=3 V to 5.5 V |
| Input capacitance Ci | 4 pF typ; VI=VCC or GND, VCC=3.3 V |
| Propagation delay tpd | 1.7 to 6.9 ns; A to Y, CL=15 pF, VCC=1.8 V +/-0.15 V, -40 °C to 85 °C |
| Propagation delay tpd | 0.6 to 4.6 ns; A to Y, CL=15 pF, VCC=2.5 V +/-0.2 V, -40 °C to 85 °C |
| Propagation delay tpd | 0.6 to 3.7 ns; A to Y, CL=15 pF, VCC=3.3 V +/-0.3 V, -40 °C to 85 °C |
| Propagation delay tpd | 0.5 to 3.4 ns; A to Y, CL=15 pF, VCC=5 V +/-0.5 V, -40 °C to 85 °C |
| Propagation delay tpd | 2.6 to 8 ns; A to Y, CL=30 pF, VCC=1.8 V +/-0.15 V, -40 °C to 85 °C |
| Propagation delay tpd | 1.1 to 5.5 ns; A to Y, CL=30 pF, VCC=2.5 V +/-0.2 V, -40 °C to 85 °C |
| Propagation delay tpd | 1 to 4.5 ns; A to Y, CL=50 pF, VCC=3.3 V +/-0.3 V, -40 °C to 85 °C |
| Propagation delay tpd | 1 to 4 ns; A to Y, CL=50 pF, VCC=5 V +/-0.5 V, -40 °C to 85 °C |
| Enable time ten | 2.8 to 9.4 ns; OE to Y, VCC=1.8 V +/-0.15 V, -40 °C to 85 °C |
| Enable time ten | 1.3 to 6.6 ns; OE to Y, VCC=2.5 V +/-0.2 V, -40 °C to 85 °C |
| Enable time ten | 1.2 to 5.3 ns; OE to Y, VCC=3.3 V +/-0.3 V, -40 °C to 85 °C |
| Enable time ten | 1 to 5 ns; OE to Y, VCC=5 V +/-0.5 V, -40 °C to 85 °C |
| Disable time tdis | 1.6 to 9.8 ns; OE to Y, VCC=1.8 V +/-0.15 V, -40 °C to 85 °C |
| Disable time tdis | 1 to 5.5 ns; OE to Y, VCC=2.5 V +/-0.2 V, -40 °C to 85 °C |
| Disable time tdis | 1 to 5.5 ns; OE to Y, VCC=3.3 V +/-0.3 V, -40 °C to 85 °C |
| Disable time tdis | 1 to 4.2 ns; OE to Y, VCC=5 V +/-0.5 V, -40 °C to 85 °C |
| Propagation delay tpd | 2.6 to 9 ns; A to Y, VCC=1.8 V +/-0.15 V, -40 °C to 125 °C |
| Propagation delay tpd | 1.1 to 5.7 ns; A to Y, VCC=2.5 V +/-0.2 V, -40 °C to 125 °C |
| Propagation delay tpd | 1 to 4.7 ns; A to Y, VCC=3.3 V +/-0.3 V, -40 °C to 125 °C |
| Propagation delay tpd | 1 to 4.2 ns; A to Y, VCC=5 V +/-0.5 V, -40 °C to 125 °C |
| Enable time ten | 2.8 to 9.6 ns; OE to Y, VCC=1.8 V +/-0.15 V, -40 °C to 125 °C |
| Enable time ten | 1.3 to 6.8 ns; OE to Y, VCC=2.5 V +/-0.2 V, -40 °C to 125 °C |
| Enable time ten | 1.2 to 5.5 ns; OE to Y, VCC=3.3 V +/-0.3 V, -40 °C to 125 °C |
| Enable time ten | 1 to 5.2 ns; OE to Y, VCC=5 V +/-0.5 V, -40 °C to 125 °C |
| Disable time tdis | 1.6 to 10 ns; OE to Y, VCC=1.8 V +/-0.15 V, -40 °C to 125 °C |
| Disable time tdis | 1 to 5.7 ns; OE to Y, VCC=2.5 V +/-0.2 V, -40 °C to 125 °C |
| Disable time tdis | 1 to 5.7 ns; OE to Y, VCC=3.3 V +/-0.3 V, -40 °C to 125 °C |
| Disable time tdis | 1 to 4.4 ns; OE to Y, VCC=5 V +/-0.5 V, -40 °C to 125 °C |
| Power dissipation capacitance Cpd | 19 pF typ; outputs enabled, f=10 MHz, TA=25 °C, VCC=1.8 V/2.5 V/3.3 V |
| Power dissipation capacitance Cpd | 21 pF typ; outputs enabled, f=10 MHz, TA=25 °C, VCC=5 V |
| Power dissipation capacitance Cpd | 2 pF typ; outputs disabled, f=10 MHz, TA=25 °C, VCC=1.8 V/2.5 V |
| Power dissipation capacitance Cpd | 3 pF typ; outputs disabled, f=10 MHz, TA=25 °C, VCC=3.3 V |
| Power dissipation capacitance Cpd | 4 pF typ; outputs disabled, f=10 MHz, TA=25 °C, VCC=5 V |
| Measurement load capacitance | 15 pF; Figure 3 switching measurement for 1.8 V, 2.5 V, 3.3 V, and 5 V |
| Measurement load resistance | 1 Mohm; Figure 3 switching measurement |
| Measurement input rise/fall time | <=2 ns; VCC=1.8 V +/-0.15 V or 2.5 V +/-0.2 V, Figure 3 |
| Measurement input rise/fall time | <=2.5 ns; VCC=3.3 V +/-0.3 V or 5 V +/-0.5 V, Figure 3 |
| Measurement pulse generator repetition rate | <=10 MHz; parameter measurement note C |
| Measurement pulse generator output impedance | 50 ohm; parameter measurement note C |
| Datasheet Status | request_only |
Product Overview
The SN74LVC1G126 is a Texas Instruments single 3-state bus buffer for Signal_Chain designs. It implements one line driver/buffer with a 3-state output; the Y output is disabled when the OE input is low. The device supports 5-V VCC operation, accepts input voltages to 5.5 V, and provides down translation to VCC.
Operating recommendations include a 1.65 to 5.5 V supply range, 0 to 5.5 V input range, and 0 to VCC output range. At 3.3 V, the feature-list maximum propagation delay is 3.7 ns and output drive is +/-24 mA. Supply current is specified at 10 uA maximum, while Ioff supports live insertion, partial-power-down mode, and back-drive protection.
Package options include SOT-23, SC70, SOT, SON, and XBGA formats. Pin assignments identify OE on pin 1, A on pin 2, GND on pin 3, Y on pin 4, and VCC on pin 5 or pin 6 depending on package. The device is specified for -40 to 125 °C free-air operation.
Key Features
- Single line driver/buffer with 3-state output
- Output disabled when output-enable input is low
- Recommended supply range from 1.65 to 5.5 V
- Inputs accept voltages up to 5.5 V
- Provides down translation to VCC
- 3.7 ns maximum propagation delay at 3.3 V
- 10 uA maximum supply current ICC
- +/-24 mA output drive at 3.3 V
- Ioff supports live insertion and back-drive protection
- -40 to 125 °C operating free-air temperature
Typical Applications
- 3-state bus buffering
- Line driver output control
- Logic signal down translation
- Live-insertion signal paths
- Partial-power-down interfaces
- Back-drive protected logic outputs
- Compact single-buffer layouts
Procurement Notes
When requesting a quote for SN74LVC1G126, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What logic function does the SN74LVC1G126 provide?
The SN74LVC1G126 provides a single line driver/buffer with a 3-state output. The output is disabled when the output-enable input is low, allowing the Y output to enter the high-impedance state.
What supply voltage range is recommended for operation?
The recommended operating supply voltage range is 1.65 to 5.5 V. A 1.5 V data-retention supply condition is also listed for data retention only.
Which packages and pins are listed for this device?
Listed packages include SOT-23, SC70, SOT, SON, and XBGA options. OE is pin 1, A is pin 2, GND is pin 3, Y is pin 4, and VCC is pin 5 or pin 6 depending on package.
What output drive and delay are specified at 3.3 V?
At VCC=3.3 V, the feature list specifies +/-24 mA output drive current and a 3.7 ns maximum propagation delay. Detailed timing tables also list A-to-Y propagation-delay ranges under specific load and temperature conditions.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.