TLV2186 Zero-Drift Operational Amplifier

Texas Instruments Signal_Chain — specifications, applications, sourcing support and RFQ.

TLV2186 Zero-Drift Operational Amplifier

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Part Number
TLV2186
Manufacturer
Texas Instruments
Package
SOIC-8 4.90 mm x 3.90 mm; WSON-8 2.00 mm x 2.00 mm with exposed thermal pad
Category
Signal Chain
Product Type
Operational Amplifier

Quick Sourcing Note

TLV2186 from Texas Instruments is a Signal_Chain zero-drift operational amplifier supplied as a dual operational amplifier with rail-to-rail input and output operation. It supports 4.5 V to 24 V single-supply operation or ±2.25 V to ±12 V dual-supply operation, with a specified ambient temperature range of -40°C to +125°C. Package options include SOIC-8 4.90 mm x 3.90 mm and WSON-8 2.00 mm x 2.00 mm with exposed thermal pad. Key parameters include ±10 µV typical input offset voltage, ±0.1 µV/°C typical drift, 750 kHz gain-bandwidth product, 0.35 V/µs slew rate, and 90 µA typical quiescent current per amplifier.

Specifications

TypeDescription
Part NumberTLV2186
ManufacturerTexas Instruments
Product TypeOperational Amplifier
CategorySignal Chain
Package / CaseSOIC-8 4.90 mm x 3.90 mm; WSON-8 2.00 mm x 2.00 mm with exposed thermal pad
Amplifier channels2; TLV2186 dual operational amplifier
Input/output typeRail-to-rail input and output; device description/features
Supply voltage range4.5 V to 24 V; recommended operating conditions, single supply
Dual supply voltage range±2.25 V to ±12 V; recommended operating conditions
Maximum supply voltage26 V; absolute maximum rating, VS=(V+)–(V−)
Specified ambient temperature range-40°C to +125°C; recommended operating conditions
Operating junction temperature-40°C to +150°C; absolute maximum rating
Storage temperature-65°C to +150°C; absolute maximum rating
Input common-mode voltage absolute maximum(V−)-0.5 V to (V+)+0.5 V; absolute maximum rating
Differential input voltage absolute maximum(V+)–(V−)+0.2 V; absolute maximum rating
Output short-circuit ratingContinuous; short-circuit to ground, one amplifier per package
HBM ESD rating4000 V; ANSI/ESDA/JEDEC JS-001
CDM ESD rating1500 V; JEDEC JESD22-C101
Input offset voltage±10 µV typ, ±250 µV max; TA=25°C, VS=±2.25 V to ±12 V, RL=10 kΩ to VS/2, VCM=VS/2, VOUT=VS/2
Input offset voltage drift±0.1 µV/°C typ, ±1.0 µV/°C max; TA=-40°C to +125°C
Power-supply rejection ratio±0.05 µV/V typ, ±1 µV/V max; TA=-40°C to +125°C
Input bias current0.1 nA typ, 0.6 nA max; TA=25°C
Input bias current0.6 nA max; TA=-40°C to +85°C
Input bias current5 nA max; TA=-40°C to +125°C
Input offset current0.1 nA typ, 1.2 nA max; TA=25°C
Input offset current1.2 nA max; TA=-40°C to +85°C
Input offset current2 nA max; TA=-40°C to +125°C
Input voltage noise110 nVRMS; f=0.1 Hz to 10 Hz
Input voltage noise density38 nV/√Hz; f=1 kHz
Input current noise100 fA/√Hz; f=1 kHz
Common-mode voltage range(V−)-0.2 V to (V+)+0.2 V; electrical characteristics
Common-mode rejection ratio108 dB min, 126 dB typ; (V−)-0.1 V < VCM < (V+)+0.1 V, VS=±2.25 V
Common-mode rejection ratio110 dB min, 134 dB typ; (V−)-0.1 V < VCM < (V+)+0.1 V, VS=±12 V, TA=-40°C to +125°C
Gain-bandwidth product750 kHz; electrical characteristics
Slew rate0.35 V/µs; 1-V step, G=1
Settling time7.5 µs; to 0.1%, 1-V step, G=1
Overload recovery time10 µs; VIN x gain > VS
Differential input impedance/capacitance100 MΩ || 5 pF; differential input
Common-mode input impedance/capacitance50 GΩ || 2.5 pF; common-mode input
Open-loop voltage gain120 dB min, 140 dB typ; VS=±12 V, (V−)+0.3 V < VO < (V+)-0.3 V, RL=10 kΩ
Open-loop voltage gain120 dB min, 134 dB typ; VS=±12 V, (V−)+0.3 V < VO < (V+)-0.3 V, RL=10 kΩ, TA=-40°C to +125°C
Output voltage swing from rails5 mV typ, 20 mV max; no load
Output voltage swing from rails60 mV typ, 100 mV max; RL=10 kΩ
Output voltage swing from rails340 mV typ, 500 mV max; RL=2 kΩ
Short-circuit current±20 mA; electrical characteristics
Quiescent current per amplifier90 µA typ, 130 µA max; VS=±2.25 V to ±12 V
Quiescent current per amplifier150 µA max; VS=±2.25 V to ±12 V, TA=-40°C to +125°C
SOIC junction-to-ambient thermal resistance129.4°C/W; D package, 8 pins
WSON junction-to-ambient thermal resistance70.2°C/W; DSG package, 8 pins
Thermal pad connectionConnect thermal die pad to V−; WSON-8 exposed thermal pad
Datasheet Statusrequest_only

Product Overview

The TLV2186 is a Texas Instruments dual zero-drift operational amplifier in the Signal_Chain category. It provides rail-to-rail input and output operation and is specified for 4.5 V to 24 V single-supply operation or ±2.25 V to ±12 V dual-supply operation. The device is specified across -40°C to +125°C ambient temperature, with absolute maximum junction temperature from -40°C to +150°C.

Electrical characteristics include ±10 µV typical input offset voltage, ±0.1 µV/°C typical offset drift, 0.1 nA typical input bias current at 25°C, 110 nVRMS input voltage noise from 0.1 Hz to 10 Hz, and 38 nV/√Hz voltage noise density at 1 kHz. Dynamic parameters include 750 kHz gain-bandwidth product, 0.35 V/µs slew rate, 7.5 µs settling time to 0.1%, and 10 µs overload recovery time.

Package options are SOIC-8 and WSON-8. The WSON-8 version includes an exposed thermal pad that is connected to V−. These characteristics support precision signal-chain amplifier functions where low offset, rail-to-rail operation, and low quiescent current are required.

Key Features

  • Dual zero-drift operational amplifier configuration
  • Rail-to-rail input and output operation
  • 4.5 V to 24 V single-supply range
  • ±2.25 V to ±12 V dual-supply range
  • ±10 µV typical input offset voltage
  • ±0.1 µV/°C typical input offset drift
  • 750 kHz gain-bandwidth product
  • 0.35 V/µs slew rate
  • 90 µA typical quiescent current per amplifier
  • SOIC-8 and WSON-8 package options

Typical Applications

  • Precision signal conditioning
  • Rail-to-rail amplifier stages
  • Low-offset measurement circuits
  • Dual operational amplifier circuits
  • Single-supply analog signal chains
  • Low-quiescent-current amplifier designs
  • WSON assemblies using exposed thermal pad

Procurement Notes

When requesting a quote for TLV2186, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.

FAQ

How many amplifier channels does the TLV2186 include?

The TLV2186 is specified as a dual operational amplifier, so it includes two amplifier channels in one package.

What supply voltage ranges are specified for TLV2186?

The TLV2186 operates from a 4.5 V to 24 V single supply or from dual supplies of ±2.25 V to ±12 V under recommended operating conditions.

What package options are listed for the TLV2186?

The listed package options are SOIC-8 measuring 4.90 mm x 3.90 mm and WSON-8 measuring 2.00 mm x 2.00 mm with an exposed thermal pad.

What offset and drift values are specified?

At 25°C, input offset voltage is ±10 µV typical and ±250 µV maximum. Across -40°C to +125°C, input offset voltage drift is ±0.1 µV/°C typical and ±1.0 µV/°C maximum.

How should the WSON exposed thermal pad be connected?

For the WSON-8 package with exposed thermal pad, the datasheet fact states that the thermal die pad is connected to V−.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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