Specifications
| Type | Description |
|---|---|
| Part Number | TLV70433DBVR |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Component Type | Power_IC |
| Package / Case | DBV (SOT-23, 5), 2.90 mm × 1.60 mm body |
| Input Voltage Range | 2.5 to 24 V; recommended operating conditions; source page 5 |
| Maximum Input Voltage | 30 V max; new chip only, feature description / absolute maximum rating; source page 1 |
| Absolute Maximum VIN | -0.3 to 24 V; legacy chip only, over operating temperature range; source page 4 |
| Absolute Maximum VIN | -0.3 to 30 V; new chip only, over operating temperature range; source page 4 |
| Available Fixed Output Voltage Options | 1.8 to 5 V; fixed output options; source page 1 |
| Recommended Output Voltage Range | 1.205 to 5 V; recommended operating conditions; source page 5 |
| Electrical Output Voltage Range | 1.2 to 5 V; TJ = 25°C; source page 6 |
| Output Current | 0 to 150 mA; recommended operating conditions; source page 5 |
| Maximum Output Current | Up to 150 mA; feature description; source page 1 |
| DC Output Accuracy | -2% to +2%; TJ = 25°C; source page 6 |
| Quiescent Current | 3.4 µA typ; 100 mA load current; source page 1 |
| Ground Pin Current | 3.2 µA typ, 4.5 µA max; legacy chip, IOUT = 0 mA, TJ = 25°C; source page 6 |
| Ground Pin Current | 3.2 µA typ, 5.5 µA max; legacy chip, IOUT = 100 mA, TJ = 25°C; source page 6 |
| Ground Pin Current | 3.2 µA typ, 4.1 µA max; new chip, IOUT = 0 mA, TJ = 25°C; source page 6 |
| Ground Pin Current | 3.4 µA typ, 4.5 µA max; new chip, IOUT = 100 mA, TJ = 25°C; source page 6 |
| Dropout Voltage | 75 mV typ; VIN = VOUT(nom) - 0.1 V, IOUT = 10 mA, TJ = 25°C; source page 6 |
| Dropout Voltage | 400 mV typ; VIN = VOUT(nom) - 0.1 V, IOUT = 50 mA, TJ = 25°C; source page 6 |
| Dropout Voltage | 850 mV typ, 1100 mV max; VIN = VOUT(nom) - 0.1 V, IOUT = 100 mA, TJ = 25°C; source page 6 |
| Load Regulation | 10 mV typ; VOUT < 3.3 V, 0 < IOUT < 10 mA, TJ = 25°C; source page 6 |
| Load Regulation | 25 mV typ; VOUT < 3.3 V, 0 < IOUT < 50 mA, TJ = 25°C; source page 6 |
| Load Regulation | 33 mV typ, 50 mV max; VOUT < 3.3 V, 0 < IOUT < 100 mA, TJ = 25°C; source page 6 |
| Load Regulation | 7 mV typ; VOUT ≥ 3.3 V, 0 < IOUT < 10 mA, TJ = 25°C; source page 6 |
| Load Regulation | 35 mV typ; VOUT ≥ 3.3 V, 0 < IOUT < 50 mA, TJ = 25°C; source page 6 |
| Load Regulation | 50 mV typ, 75 mV max; VOUT ≥ 3.3 V, 0 < IOUT < 100 mA, TJ = 25°C; source page 6 |
| Line Regulation | 20 mV typ, 50 mV max; VOUT(NOM) + 1 V ≤ VIN ≤ 24 V, TJ = 25°C; source page 6 |
| Output Current Limit | 160 mA min, 1000 mA max; legacy chip, VOUT = 0 V, TJ = 25°C; source page 6 |
| Output Current Limit | 160 mA min, 500 mA max; new chip, VOUT = 0 V, TJ = 25°C; source page 6 |
| Power-Supply Ripple Rejection | 60 dB; f = 100 kHz, COUT = 10 µF; source page 6 |
| Minimum Output Capacitor | ≥ 0.47 µF effective capacitance; stability requirement at OUT pin; source page 3 |
| Recommended Output Capacitor | 1 µF or larger; from OUT pin to ground; source page 3 |
| Recommended Input Capacitor | 0.1 µF or larger; from IN pin to ground; source page 3 |
| Recommended Input Capacitor Effective Value | 0.047 µF; recommended to counteract source resistance and inductance; not required for LDO stability; source page 5 |
| Recommended COUT | 0.47 to 1 µF; legacy chip, recommended operating conditions; source page 5 |
| Recommended COUT | 1 µF; new chip, recommended operating conditions; maintain 0.47 µF minimum effective capacitance; source page 5 |
| Operating Junction Temperature | -40°C to +125°C; recommended operating conditions / electrical characteristics; source page 5 |
| Absolute Maximum Junction Temperature | -40°C to +150°C; absolute maximum ratings; source page 4 |
| Storage Temperature | -65°C to +150°C; absolute maximum ratings; source page 4 |
| ESD Rating HBM | ±2000 V; human body model per ANSI/ESDA/JEDEC JS-001, all pins; source page 4 |
| ESD Rating CDM | ±500 V; charged device model per JEDEC JESD22-C101, all pins; source page 4 |
| Thermal Resistance RθJA | 213.1°C/W; legacy chip, DBV SOT-23 5-pin package; source page 5 |
| Thermal Resistance RθJA | 170.8°C/W; new chip, DBV SOT-23 5-pin package; source page 5 |
| Thermal Resistance RθJC(top) | 110.9°C/W; legacy chip, DBV SOT-23 5-pin package; source page 5 |
| Thermal Resistance RθJC(top) | 68.7°C/W; new chip, DBV SOT-23 5-pin package; source page 5 |
| Thermal Resistance RθJB | 97.4°C/W; legacy chip, DBV SOT-23 5-pin package; source page 5 |
| Thermal Resistance RθJB | 76.7°C/W; new chip, DBV SOT-23 5-pin package; source page 5 |
| Pin Count | 5 pins; DBV SOT-23 package; source page 3 |
| Pin 1 Function | GND; ground pin; source page 3 |
| Pin 2 Function | IN; input supply pin; source page 3 |
| Pin 3 Function | OUT; regulator output pin; source page 3 |
| Pin 4 and Pin 5 Function | NC; not internally connected; can be left open or tied to ground for improved thermal performance; source page 3 |
| Protection Feature | Overcurrent protection; built-in current limit protection for load short or fault; source page 1 |
| Soft-Start Feature | Internal soft-start; lowers inrush current; source page 1 |
| Datasheet Status | request_only |
Product Overview
The TLV70433DBVR is a Texas Instruments low-dropout linear regulator for Power_Management designs requiring up to 150 mA output current. Recommended operating conditions specify a 2.5 to 24 V input range, a 1.205 to 5 V recommended output voltage range, and -40°C to +125°C operating junction temperature.
The regulator is supplied in the DBV SOT-23 5-pin package with a 2.90 mm × 1.60 mm body. Pin functions are GND on pin 1, IN on pin 2, OUT on pin 3, and NC on pins 4 and 5. The NC pins are not internally connected and may be left open or tied to ground for improved thermal performance.
Electrical characteristics include ±2% DC output accuracy at TJ = 25°C, 3.4 µA typical quiescent current at 100 mA load, and dropout voltage values of 75 mV at 10 mA, 400 mV at 50 mA, and 850 mV typical at 100 mA. The device requires output capacitance for stability and includes overcurrent protection plus internal soft-start.
Key Features
- 2.5 to 24 V recommended input range
- Up to 150 mA output current
- 1.8 to 5 V fixed output options
- ±2% DC output accuracy at 25°C
- 3.4 µA typical quiescent current at 100 mA
- 60 dB PSRR at 100 kHz
- Internal soft-start lowers inrush current
- Built-in overcurrent protection for load faults
- Requires at least 0.47 µF effective output capacitance
- DBV SOT-23 5-pin package
Typical Applications
- Low-current regulated power rails
- Battery-powered power management
- 24 V input rail regulation
- Fixed 3.3 V regulator designs
- Compact SOT-23 power circuits
- Short-circuit protected LDO outputs
- Noise-sensitive rails needing PSRR
Procurement Notes
When requesting a quote for TLV70433DBVR, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What input voltage range does TLV70433DBVR support?
TLV70433DBVR has a recommended operating input voltage range of 2.5 to 24 V. The extracted datasheet facts also distinguish absolute maximum VIN limits for legacy and new chips, including -0.3 to 30 V for the new chip.
What output current can the TLV70433DBVR deliver?
The recommended operating output current range is 0 to 150 mA, and the feature description lists maximum output current as up to 150 mA. Output current limit is specified separately for legacy and new chip conditions at VOUT = 0 V.
What capacitors are recommended for this regulator?
The OUT pin requires at least 0.47 µF effective capacitance for stability, with 1 µF or larger recommended from OUT to ground. The IN pin recommendation is 0.1 µF or larger, with 0.047 µF effective input capacitance recommended to counteract source impedance.
What package and pins does TLV70433DBVR use?
TLV70433DBVR uses the DBV SOT-23 5-pin package with a 2.90 mm × 1.60 mm body. Pin 1 is GND, pin 2 is IN, pin 3 is OUT, and pins 4 and 5 are NC pins that may be left open or tied to ground.
Does TLV70433DBVR include protection or startup control?
Yes. The extracted facts list built-in overcurrent protection for load short or fault conditions. The device also includes internal soft-start, which lowers inrush current during startup.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.