Specifications
| Type | Description |
|---|---|
| Part Number | TPS5430DDAR |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Component Type | Power_IC |
| Package / Case | DDA, 8-pin HSOIC PowerPAD thermal pad package |
| Input Voltage Range | 5.5-36 V; TPS5430 recommended operating condition |
| Output Current | 3 A continuous, 4 A peak; device feature specification |
| Switching Frequency | 400 min, 500 typ, 600 max kHz; TJ=-40°C to 125°C, VIN=5.5 V to 36 V |
| Output Voltage Range | Adjustable down to 1.22 V; 1.5% initial accuracy |
| Efficiency | Up to 95%; enabled by integrated MOSFET switch |
| Feedback Voltage | 1.202 min, 1.221 typ, 1.239 max V; TJ=25°C |
| Feedback Voltage | 1.196 min, 1.221 typ, 1.245 max V; TJ=-40°C to 125°C |
| VIN Quiescent Current | 2 typ, 4.4 max mA; non-switching, VSENSE=2 V, PH pin open |
| VIN Shutdown Supply Current | 15 typ, 50 max µA; shutdown, ENA=0 V |
| VIN UVLO Rising Threshold | 5.3 min, 5.5 max V; VVIN rising |
| VIN UVLO Hysteresis | 0.35 typ V; undervoltage lockout |
| Minimum On Pulse Width | 150 typ, 200 max ns; TJ=-40°C to 125°C, VIN=5.5 V to 36 V |
| Maximum Duty Cycle | 87% min, 89% typ; fSW=500 kHz |
| ENA Rising Threshold | 1.3 V; device starts switching above this threshold |
| ENA Falling Threshold | 0.5 V; device stops switching below this threshold |
| ENA Hysteresis | 325 mV; enable pin threshold hysteresis |
| ENA Pullup Resistance | 1.5 MΩ; internal pullup resistor, ENA can be left floating |
| Internal Slow-Start Time | 5.4 min, 8 typ, 10 max ms; 0 to 100% |
| High-Side Peak Current Limit | 4.0 min, 5.0 typ, 6.0 max A; overcurrent protection |
| Hiccup Time Before Restart | 13 min, 16 typ, 20 max ms; overcurrent protection |
| High-Side MOSFET On-Resistance | 100 typ, 230 max mΩ; VIN=12 V, VBOOT-SW=4.5 V |
| High-Side MOSFET On-Resistance | 125 typ mΩ; VIN=5.5 V, VBOOT-SW=4.0 V |
| Thermal Shutdown Threshold | 135 min, 162 typ °C; temperature rising, specified by design/statistical analysis/correlated testing |
| Thermal Shutdown Hysteresis | 14 typ °C; specified by design/statistical analysis/correlated testing |
| Operating Junction Temperature | -40 to 125 °C; recommended operating condition |
| Absolute Maximum VIN to GND | -0.3 to 40 V; TPS5430 absolute maximum rating |
| Absolute Maximum ENA to GND | -0.3 to 7 V; absolute maximum rating |
| Absolute Maximum VSENSE to GND | -0.3 to 3 V; absolute maximum rating |
| Absolute Maximum BOOT to PH | -0.3 to 6 V; BOOT-PH capacitor rated at least 10 V |
| Absolute Maximum PH to GND | -0.6 to 40 V; TPS5430 steady-state absolute maximum rating |
| PH Transient Voltage | -1.2 V; transient less than 10 ns |
| PH Leakage Current | 10 µA; absolute maximum source current leakage current |
| Absolute Maximum Operating Virtual Junction Temperature | -40 to 150 °C; absolute maximum rating |
| Storage Temperature | -65 to 150 °C; absolute maximum rating |
| ESD Rating HBM | ±2000 V; human-body model per ANSI/ESDA/JEDEC JS-001 |
| ESD Rating CDM | ±750 V; charged-device model per JEDEC JESD22-C101 |
| Junction-to-Ambient Thermal Resistance | 45 °C/W; DDA package, TPS5430EVM |
| Junction-to-Ambient Thermal Resistance | 42.3 °C/W; DDA package, JESD 51-7 4-layer JEDEC board |
| Junction-to-Case Top Thermal Resistance | 46 °C/W; DDA package |
| Junction-to-Board Thermal Resistance | 15 °C/W; DDA package |
| Junction-to-Top Characterization Parameter | 5.2 °C/W; DDA package |
| Junction-to-Board Characterization Parameter | 15.3 °C/W; DDA package |
| Junction-to-Case Bottom Thermal Resistance | 6 °C/W; DDA package |
| BOOT Pin Capacitor | 0.01 µF; low ESR capacitor from BOOT pin to PH pin |
| Control Topology | Constant-frequency voltage-mode control with voltage feedforward |
| Datasheet Status | request_only |
Product Overview
TPS5430DDAR is a Texas Instruments Power_Management Power_IC for step-down conversion. The device is specified as a 3A buck converter with 3 A continuous output current and 4 A peak capability. Its recommended input range is 5.5-36 V, and the output is adjustable down to 1.22 V with 1.5% initial accuracy.
The converter uses constant-frequency voltage-mode control with voltage feedforward. Switching frequency is specified from 400 kHz minimum to 600 kHz maximum, with 500 kHz typical, across TJ=-40°C to 125°C and VIN=5.5 V to 36 V. The feedback reference is 1.221 V typical, and the device includes an internal 5.4-10 ms slow-start interval.
TPS5430DDAR is supplied in the DDA, 8-pin HSOIC PowerPAD thermal pad package. Package thermal data includes 45°C/W junction-to-ambient on the TPS5430EVM and 42.3°C/W on a JESD 51-7 4-layer JEDEC board. Protection and control functions include VIN UVLO, enable thresholds, high-side peak current limit, hiccup restart timing, and thermal shutdown.
Key Features
- 5.5-36 V recommended input voltage range
- 3 A continuous and 4 A peak output current
- Adjustable output voltage down to 1.22 V
- 400-600 kHz switching frequency across operating range
- Up to 95% efficiency with integrated MOSFET switch
- Constant-frequency voltage-mode control with voltage feedforward
- Internal slow-start specified from 5.4 ms to 10 ms
- High-side peak current limit from 4.0 A to 6.0 A
- Hiccup restart timing for overcurrent protection
- Thermal shutdown threshold of 135°C minimum, 162°C typical
- Enable input with internal 1.5 MΩ pullup
- DDA 8-pin HSOIC PowerPAD thermal pad package
Typical Applications
- 5.5-36 V step-down rails
- 3 A regulated outputs
- Adjustable 1.22 V output supplies
- 12 V input buck conversion
- 24 V input buck conversion
- PowerPAD thermal designs
- Enable-controlled power rails
- Voltage-mode buck regulator designs
Procurement Notes
When requesting a quote for TPS5430DDAR, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What input voltage range does TPS5430DDAR support?
TPS5430DDAR is specified for a 5.5-36 V input voltage range under the TPS5430 recommended operating condition. The absolute maximum VIN-to-GND rating is -0.3 to 40 V.
How much output current can TPS5430DDAR provide?
The device feature specification lists 3 A continuous output current and 4 A peak output current. High-side peak current limit is specified from 4.0 A minimum to 6.0 A maximum.
What package is used for the TPS5430DDAR device?
TPS5430DDAR uses the DDA, 8-pin HSOIC PowerPAD thermal pad package. Thermal data includes 45°C/W junction-to-ambient on the TPS5430EVM and 42.3°C/W on a JESD 51-7 4-layer JEDEC board.
What switching frequency is specified for TPS5430DDAR?
The switching frequency is specified as 400 kHz minimum, 500 kHz typical, and 600 kHz maximum across TJ=-40°C to 125°C with VIN from 5.5 V to 36 V.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.