Specifications
| Type | Description |
|---|---|
| Part Number | ADS127L11 |
| Manufacturer | Texas Instruments |
| Product Type | 24-bit Delta-Sigma ADC |
| Category | Signal Chain |
| Package / Case | RUK (WQFN, 20) 3.00 mm x 3.00 mm; PW (TSSOP, 20) 6.50 mm x 4.40 mm |
| Resolution, Delta-sigma ADC | 24 bit |
| Maximum Data Rate, Wideband filter | 400 kSPS |
| Maximum Data Rate, Low-latency filter | 1.067 MSPS |
| Dynamic Range, 200 kSPS | 111.5 dB |
| Total Harmonic Distortion | -120 dB |
| Integral Nonlinearity | 0.9 ppm of FS |
| Offset Drift | 50 nV/degC |
| Gain Drift | 0.6 ppm/degC |
| Power Consumption, High-speed mode, 400 kSPS | 18.6 mW |
| Power Consumption, Low-speed mode, 50 kSPS | 3.3 mW |
| Operating Ambient Temperature, Fully specified operation | -40 degC to +125 degC |
| AVDD1 to AVSS Absolute Maximum | -0.3 V to 6.5 V |
| AVDD2 to AVSS Absolute Maximum | -0.3 V to 6.5 V |
| AVSS to DGND Absolute Maximum | -3 V to 0.3 V |
| IOVDD to DGND Absolute Maximum | -0.3 V to 6.5 V |
| IOVDD to AVSS Absolute Maximum | 8.5 V max |
| Analog Input Voltage Absolute Maximum, AINP, AINN, REFP, REFN | AVSS - 0.3 V to AVDD1 + 0.3 V |
| CAPA Analog Output Voltage Absolute Maximum | AVSS to 1.65 V |
| CAPD Analog Output Voltage Absolute Maximum | DGND to 1.65 V |
| VCM Analog Output Voltage Absolute Maximum | AVSS to AVDD1 |
| Digital I/O Voltage Absolute Maximum, SDO/DRDY, DRDY, START | DGND - 0.3 V to IOVDD + 0.3 V |
| Digital Input Voltage Absolute Maximum, CS, SCLK, SDI, RESET, CLK | DGND - 0.3 V to 6.5 V |
| Continuous Input Current Absolute Maximum | -10 mA to 10 mA |
| Junction Temperature Absolute Maximum | 150 degC |
| Storage Temperature | -65 degC to 150 degC |
| ESD Rating HBM, ANSI/ESDA/JEDEC JS-001 | 2000 V |
| ESD Rating CDM, ANSI/ESDA/JEDEC JS-002 | 1000 V |
| AVDD1 to AVSS Recommended Operating Range, High-speed mode | 4.5 V to 5.5 V |
| AVDD1 to AVSS Recommended Operating Range, Low-speed mode | 2.85 V to 5.5 V |
| AVDD1 to DGND Recommended Minimum | 1.65 V min |
| AVSS/AVDD1 to DGND Absolute Ratio | 1.2 V/V max |
| AVDD2 to AVSS Recommended Operating Range | 1.74 V to 5.5 V |
| AVSS to DGND Recommended Operating Range | -2.75 V to 0 V |
| IOVDD to DGND Recommended Operating Range | 1.65 V to 5.5 V |
| Analog Input Absolute Voltage, AINP/AINN, Precharge Buffer Off | AVSS - 0.05 V to AVDD1 + 0.05 V |
| Analog Input Absolute Voltage, AINP/AINN, Precharge Buffer On | AVSS + 0.1 V to AVDD1 - 0.1 V |
| Differential Input Voltage, 1x Input Range | -VREF to VREF |
| Differential Input Voltage, 2x Input Range | -2*VREF to 2*VREF |
| Differential Reference Voltage, Low-reference Range | 0.5 V min, 2.5 V typ, 2.75 V max |
| Differential Reference Voltage, High-reference Range | 1 V min, 4.096 V typ, AVDD1 - AVSS max |
| Negative Reference Voltage, VREFN | AVSS - 0.05 V min |
| Positive Reference Voltage, REFP Precharge Buffer Off | AVDD1 + 0.05 V max |
| Positive Reference Voltage, REFP Precharge Buffer On | AVDD1 - 0.7 V max |
| External Clock Frequency, High-speed mode | 0.5 MHz min, 25.6 MHz typ, 26.2 MHz max |
| External Clock Frequency, Low-speed mode | 0.5 MHz min, 3.2 MHz typ, 3.28 MHz max |
| Logic Input Low Voltage | DGND min, 0.3*IOVDD max |
| Logic Input High Voltage | 0.7*IOVDD min, IOVDD max |
| Operating Ambient Temperature, Recommended Operating Conditions | -45 degC to 125 degC |
| Serial Interface | SPI with daisy-chain capability |
| Data Validation | Cyclic-redundancy check (CRC) |
| Datasheet Status | request_only |
Product Overview
ADS127L11 is a Texas Instruments 24-bit delta-sigma ADC in the Signal Chain category. The converter supports a wideband-filter maximum data rate of 400 kSPS and a low-latency-filter maximum data rate of 1.067 MSPS. At 200 kSPS, the extracted dynamic range is 111.5 dB, with -120 dB total harmonic distortion and 0.9 ppm of FS integral nonlinearity.
The package options are RUK, a 20-pin WQFN measuring 3.00 mm x 3.00 mm, and PW, a 20-pin TSSOP measuring 6.50 mm x 4.40 mm. Power-related operating facts include AVDD1 to AVSS ranges of 4.5 V to 5.5 V in high-speed mode and 2.85 V to 5.5 V in low-speed mode, AVDD2 to AVSS from 1.74 V to 5.5 V, and IOVDD to DGND from 1.65 V to 5.5 V.
Interface and validation facts include SPI with daisy-chain capability and cyclic-redundancy check validation for input/output data and register settings. Application fit is grounded in the ADC parameters: wideband acquisition, low-latency sampled data capture, SPI-connected measurement modules, and CRC-checked converter communication.
Key Features
- 24-bit delta-sigma ADC architecture
- 400 kSPS maximum data rate with wideband filter
- 1.067 MSPS maximum data rate with low-latency filter
- 111.5 dB dynamic range at 200 kSPS
- -120 dB total harmonic distortion
- 0.9 ppm of FS integral nonlinearity
- 50 nV/degC offset drift
- 0.6 ppm/degC gain drift
- SPI interface with daisy-chain capability
- CRC validation for data and register settings
Typical Applications
- Wideband signal acquisition
- Low-latency sampled data capture
- SPI-connected measurement modules
- CRC-checked converter links
- High-temperature data acquisition
- Low-power sensor digitization
- Differential input measurement
- Precision reference-based conversion
Procurement Notes
When requesting a quote for ADS127L11, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.
FAQ
What type of converter is the ADS127L11?
ADS127L11 is a Texas Instruments 24-bit delta-sigma ADC in the Signal Chain category. The extracted datasheet facts list 24-bit resolution, wideband and low-latency filter data-rate options, and SPI interface support.
What maximum data rates does ADS127L11 support?
The extracted facts specify two maximum data-rate conditions: 400 kSPS with the wideband filter and 1.067 MSPS with the low-latency filter. These ratings are tied to the listed filter operating modes.
Which package options are listed for ADS127L11?
The package facts list RUK, a 20-pin WQFN measuring 3.00 mm x 3.00 mm, and PW, a 20-pin TSSOP measuring 6.50 mm x 4.40 mm.
What interface and data validation are specified?
The digital interface is SPI with daisy-chain capability. The extracted datasheet facts also specify cyclic-redundancy check, or CRC, for input/output data and register settings.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.