Specifications
| Type | Description |
|---|---|
| Part Number | DRV8323R |
| Manufacturer | Texas Instruments |
| Product Type | LDO Regulator |
| Category | Power Management |
| Package / Case | VQFN (48), 7.00 mm x 7.00 mm nominal body |
| Component Type | Power_IC |
| Gate Driver Topology | Triple half-bridge gate driver drives 3 high-side and 3 low-side N-channel MOSFETs; condition: three-phase applications |
| Operating Voltage Range | 6 to 60 V; condition: gate driver supply |
| Buck Regulator Operating Voltage Range | 4 to 60 V; condition: optional integrated DC/DC buck regulator; present on DRV8323R |
| Buck Regulator Output Current | 600 mA; condition: integrated DC/DC buck regulator; DRV8323R variant |
| Buck Regulator Output Voltage Range | 0.8 to 60 V; condition: optional integrated buck regulator output capability |
| Peak Gate Source Current | 10 mA to 1 A; condition: Smart Gate Drive architecture, adjustable |
| Peak Gate Sink Current | 20 mA to 2 A; condition: Smart Gate Drive architecture, adjustable |
| PWM Duty Cycle Support | 100% PWM duty cycle supported; condition: using integrated gate driver power supplies |
| High-Side Gate Supply | Integrated charge pump; condition: generates high-side MOSFET gate drive voltage |
| Low-Side Gate Supply | Integrated linear regulator; condition: generates low-side MOSFET gate drive voltage |
| Current Sense Amplifiers | 3 low-side current sense amplifiers; condition: DRV8323 and DRV8323R devices |
| Current Sense Amplifier Gain | 5, 10, 20, 40 V/V; condition: adjustable gain |
| Current Sense Direction Support | Bidirectional or unidirectional; condition: integrated triple low-side current sense amplifiers |
| Control Interfaces | SPI and hardware interface variants available; condition: device configuration interface |
| DRV8323R Interface Variants | DRV8323RH hardware, DRV8323RS SPI; condition: DRV8323R device variant options |
| PWM Input Modes | 6x, 3x, 1x, and independent PWM modes; condition: controller interface modes |
| Logic Input Voltage Support | 1.8 V, 3.3 V, and 5 V logic inputs; condition: digital control inputs |
| Sleep Mode Current | 12 uA typical; condition: low-power sleep mode |
| Linear Regulator Output | 3.3 V, 30 mA; condition: integrated linear voltage regulator |
| Fault Indicator | nFAULT pin; condition: indicates fault conditions; SPI variants provide details through device registers |
| Protection Features | VM undervoltage lockout, charge pump undervoltage, MOSFET overcurrent protection, gate driver fault, thermal warning and shutdown; condition: integrated protection functions |
| ENABLE Function | Logic low places device in low-power sleep mode; condition: gate driver enable pin behavior |
| Fault Reset Pulse Width | 8 to 40 us; condition: pulse on ENABLE can reset fault conditions without entering sleep mode |
| DVDD External Capacitor | 1 uF, 6.3 V ceramic capacitor; condition: X5R or X7R capacitor between DVDD and AGND pins |
| Charge Pump Flying Capacitor | 47 nF, VM-rated ceramic capacitor; condition: X5R or X7R capacitor between CPH and CPL pins |
| Datasheet Status | request_only |
Product Overview
The DRV8323R is a Texas Instruments three-phase smart gate driver for Power_Management designs using external N-channel MOSFETs. Its triple half-bridge gate driver drives 3 high-side and 3 low-side N-channel MOSFETs for three-phase applications, with a 6 to 60 V gate-driver supply range and support for 100% PWM duty cycle using the integrated gate-driver power supplies.
The device integrates a charge pump for high-side MOSFET gate-drive voltage and an integrated linear regulator for low-side MOSFET gate-drive voltage. Smart Gate Drive architecture provides adjustable peak gate source current from 10 mA to 1 A and adjustable peak gate sink current from 20 mA to 2 A.
DRV8323R includes an optional integrated DC/DC buck regulator operating from 4 to 60 V, with 600 mA output current and 0.8 to 60 V output-voltage capability. It also provides three low-side current sense amplifiers with adjustable 5, 10, 20, and 40 V/V gain and bidirectional or unidirectional current sense support. The package is VQFN (48), 7.00 mm x 7.00 mm nominal body.
Key Features
- Triple half-bridge driver for six N-channel MOSFETs
- 6 to 60 V gate-driver supply range
- Integrated buck regulator operates from 4 to 60 V
- 600 mA integrated DC/DC buck regulator output
- Adjustable 10 mA to 1 A peak source current
- Adjustable 20 mA to 2 A peak sink current
- Integrated charge pump for high-side gate supply
- Three low-side current sense amplifiers
- 5, 10, 20, 40 V/V sense gain settings
- 6x, 3x, 1x, and independent PWM modes
- 1.8 V, 3.3 V, and 5 V logic inputs
- nFAULT pin indicates device fault conditions
Typical Applications
- Three-phase gate-driver stages
- Triple half-bridge MOSFET control
- N-channel MOSFET bridge drive
- SPI-configured motor-driver controllers
- Hardware-configured motor-driver controllers
- Low-side current sensing systems
- PWM-controlled three-phase power stages
- 60 V gate-driver supply designs
Procurement Notes
When requesting a quote for DRV8323R, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.
FAQ
What type of power device is the DRV8323R?
The DRV8323R is a Texas Instruments three-phase smart gate driver in the Power_Management category. It drives 3 high-side and 3 low-side N-channel MOSFETs through a triple half-bridge gate-driver topology for three-phase applications.
What supply voltage range does the DRV8323R gate driver support?
The gate-driver supply operating voltage range is 6 to 60 V. The DRV8323R also includes an integrated DC/DC buck regulator that operates from 4 to 60 V and provides 600 mA output current.
Which configuration interfaces are available for DRV8323R variants?
The DRV8323R family includes hardware and SPI interface variants. The extracted device variant options list DRV8323RH for hardware interface and DRV8323RS for SPI interface configuration.
What current sense functions are integrated in the DRV8323R?
DRV8323R includes three low-side current sense amplifiers. The gain is adjustable at 5, 10, 20, or 40 V/V, and the integrated current sense amplifiers support bidirectional or unidirectional current measurement.
How are DRV8323R fault conditions indicated and reset?
Fault conditions are indicated through the nFAULT pin, with SPI variants providing fault details through device registers. A pulse on the ENABLE pin from 8 to 40 us can reset fault conditions without entering sleep mode.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.