DRV8350 Three-Phase Smart Gate Driver

Texas Instruments Power_Management — specifications, applications, sourcing support and RFQ.

DRV8350 Three-Phase Smart Gate Driver

RFQ Available Sourcing Support Alternative Matching RoHS
Part Number
DRV8350
Manufacturer
Texas Instruments
Package
WQFN-32, 5.00 mm x 5.00 mm nominal body size
Category
Power Management
Product Type
LDO Regulator

Quick Sourcing Note

DRV8350 from Texas Instruments is a Power_Management three-phase smart gate driver in a WQFN-32 package with 5.00 mm x 5.00 mm nominal body size. The DRV835x family uses a triple half-bridge gate driver topology for three-phase BLDC motor applications. It supports 9 to 100 V operation, 6x, 3x, 1x, and independent PWM modes, and FOC, sinusoidal current control, and trapezoidal current control. The DRV8350 variant excludes the integrated buck regulator and integrated shunt amplifiers. Device options include the DRV8350H hardware interface and DRV8350S SPI interface, with protection features including UVLO, MOSFET VDS OCP, shoot-through prevention, and thermal protection.

Specifications

TypeDescription
Part NumberDRV8350
ManufacturerTexas Instruments
Product TypeLDO Regulator
CategoryPower Management
Package / CaseWQFN-32, 5.00 mm x 5.00 mm nominal body size
Gate Driver TopologyTriple half-bridge gate driver
Operating Voltage Range9 to 100 V
Supported Motor TypeThree-phase brushless DC (BLDC) motors
Control Methods SupportedFOC, sinusoidal current control, trapezoidal current control
PWM Modes6x, 3x, 1x, independent
Sensored Operation Support120 degree sensored operation
Interface OptionsSPI or hardware interface
Peak Gate Source Current50 mA to 1 A
Peak Gate Sink Current100 mA to 2 A
Sleep Mode Current20 uA at VM = 48 V
Integrated Buck RegulatorNot included
Integrated Shunt AmplifiersNone
DRV8350H InterfaceHardware
DRV8350S InterfaceSPI
Internal DVDD Regulator Output5 V; connect 1-uF, 6.3-V ceramic capacitor to GND
DVDD External Source CapabilityUp to 10 mA
VGLS Internal Regulator Output11 V; connect 1-uF, 16-V ceramic capacitor to GND
Charge Pump Capacitor47 nF X5R or X7R, VDRAIN-rated ceramic capacitor between CPH and CPL
VCP Capacitor1 uF, 16 V X5R or X7R ceramic capacitor between VCP and VDRAIN
VM Bypass Capacitance0.1 uF plus >=10 uF local capacitance between VM and GND
Enable Low FunctionLow-power sleep mode
Fault Reset Pulse Width8 to 40 us pulse on ENABLE pin can reset fault conditions
Fault Output TypeOpen-drain active-low fault indicator; requires external pullup resistor
Hardware IDRIVE Setting7-level input pin set by external resistor
Hardware VDS Trip Point Setting7-level input pin set by external resistor
Hardware PWM Mode Setting4-level input pin set by external resistor
Protection FeaturesVM UVLO, gate-drive supply UVLO, MOSFET VDS OCP, shoot-through prevention, gate-driver fault, thermal warning, thermal shutdown, nFAULT
Package Thermal PadExposed thermal pad
Datasheet Statusrequest_only

Product Overview

The DRV8350 is a Texas Instruments three-phase smart gate driver for Power_Management designs using external MOSFET power stages. In the DRV835x family, the gate driver topology is a triple half-bridge gate driver intended for three-phase brushless DC motor applications.

The device family supports a 9 to 100 V gate-driver supply range and PWM control modes including 6x, 3x, 1x, and independent operation. Supported BLDC control methods include FOC, sinusoidal current control, and trapezoidal current control, with 120 degree sensored operation support.

DRV8350 device variants do not include an integrated buck regulator or integrated shunt amplifiers. Interface options include DRV8350H with a hardware interface and DRV8350S with SPI. The device is supplied in a WQFN-32 package with 5.00 mm x 5.00 mm nominal body size and an exposed thermal pad for DRV8350HRTV and DRV8350SRTV packages.

Key Features

  • Triple half-bridge gate driver for DRV835x family
  • 9 to 100 V gate driver operating range
  • Supports three-phase brushless DC motor applications
  • FOC, sinusoidal, and trapezoidal current control
  • 6x, 3x, 1x, and independent PWM modes
  • SPI or hardware interface device options
  • Peak gate source current from 50 mA to 1 A
  • Peak gate sink current from 100 mA to 2 A
  • 20 uA sleep current at VM equals 48 V
  • VM UVLO, VDS OCP, and thermal protection

Typical Applications

  • Three-phase BLDC motor drives
  • FOC motor control systems
  • Sinusoidal current control drives
  • Trapezoidal current control drives
  • 120 degree sensored motor operation
  • External MOSFET half-bridge stages

Procurement Notes

When requesting a quote for DRV8350, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.

FAQ

What type of gate driver is the DRV8350?

The DRV8350 is a Texas Instruments three-phase smart gate driver. In the DRV835x family, it uses a triple half-bridge gate driver topology for three-phase brushless DC motor applications.

Which interfaces are available for DRV8350 variants?

The DRV8350 device family includes SPI or hardware interface options. The DRV8350H variant uses a hardware interface, while the DRV8350S variant uses an SPI interface.

Does the DRV8350 include a buck regulator or shunt amplifiers?

For the DRV8350 device variant, the integrated buck regulator is not included, and integrated shunt amplifiers are listed as none in the extracted device information.

What external capacitors are specified for DRV8350 support pins?

The extracted facts specify a 47 nF charge pump capacitor between CPH and CPL, a 1 uF 16 V capacitor between VCP and VDRAIN, and 0.1 uF plus at least 10 uF local capacitance between VM and GND.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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