LM5111 Dual 5-A Gate Driver

Texas Instruments Power_Management — specifications, applications, sourcing support and RFQ.

LM5111 Dual 5-A Gate Driver

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Part Number
LM5111
Manufacturer
Texas Instruments
Package
SOIC-8 5.00 mm x 6.00 mm; MSOP-PowerPAD-8 3.00 mm x 4.90 mm
Category
Power Management
Product Type
LDO Regulator

Quick Sourcing Note

LM5111 from Texas Instruments is a Power_Management dual 5-A gate driver for two independent gate-drive channels. It drives two N-channel MOSFETs with outputs that swing from VCC to VEE and supports a 3.5-14 V VCC-to-VEE operating range. The device provides 5 A peak sink current and 3 A peak source current under pulsed test conditions. Package options include SOIC-8 5.00 mm x 6.00 mm and MSOP-PowerPAD-8 3.00 mm x 4.90 mm. Key timing values include 25 ns typical propagation delays, 14 ns typical rise time, and 12 ns typical fall time with 2 nF load.

Specifications

TypeDescription
Part NumberLM5111
ManufacturerTexas Instruments
Product TypeLDO Regulator
CategoryPower Management
Package CaseSOIC-8 5.00 mm x 6.00 mm; MSOP-PowerPAD-8 3.00 mm x 4.90 mm
Driver Channels2 independent channels; condition: dual gate driver
MOSFET Drive TypeDrives two N-channel MOSFETs; condition: independent outputs
Peak Sink Current5 A; condition: OUTA/OUTB = VCC/2, 200-ns pulsed current
Peak Source Current3 A; condition: OUTA/OUTB = VCC/2, 200-ns pulsed current
Output Voltage SwingVCC to VEE; condition: OUT_A and OUT_B driver outputs
Supply Operating Range3.5-14 V; condition: VCC - VEE
Absolute Maximum Supply Voltage-0.3 to 15 V; condition: VCC to VEE
Absolute Maximum Input Voltage-0.3 to 15 V; condition: IN to VEE
Maximum Junction Temperature150 °C; condition: absolute maximum rating
Storage Temperature Range-55 to 150 °C; condition: absolute maximum rating
Operating Junction Temperature125 °C max; condition: recommended operating conditions
UVLO Rising Threshold2.3 V min, 2.9 V typ, 3.5 V max; condition: VCC - VEE rising
UVLO Hysteresis230 mV typ; condition: VCC undervoltage lockout hysteresis
Supply Current LM5111-11 mA typ, 2 mA max; condition: IN_A = IN_B = 0 V
Supply Current LM5111-21 mA typ, 2 mA max; condition: IN_A = IN_B = VCC
Supply Current LM5111-31 mA typ, 2 mA max; condition: IN_A = VCC, IN_B = 0 V
Logic High Input Voltage2.2 V min; condition: control inputs
Logic Low Input Voltage0.8 V max; condition: control inputs
Input High Threshold1.3 V min, 1.75 V typ, 2.2 V max; condition: control inputs
Input Low Threshold0.8 V min, 1.35 V typ, 2.0 V max; condition: control inputs
Input Hysteresis400 mV typ; condition: control inputs
Input Current Low-1 µA min, 0.1 µA typ, 1 µA max; condition: IN_A = IN_B = VCC, LM5111-1/-2/-3
Input Current High LM5111-310 µA min, 18 µA typ, 25 µA max; condition: IN_B = VCC
Input Current High LM5111-2-1 µA min, 0.1 µA typ, 1 µA max; condition: IN_A = IN_B = VCC
Output Resistance High30 Ω typ, 50 Ω max; condition: IOUT = -10 mA; MOS device only
Output Resistance Low1.4 Ω typ, 2.5 Ω max; condition: IOUT = +10 mA; MOS device only
Propagation Delay Low-to-High25 ns typ, 40 ns max; condition: input rising, IN to OUT, CLOAD = 2 nF
Propagation Delay High-to-Low25 ns typ, 40 ns max; condition: input falling, IN to OUT, CLOAD = 2 nF
Rise Time14 ns typ, 25 ns max; condition: CLOAD = 2 nF
Fall Time12 ns typ, 25 ns max; condition: CLOAD = 2 nF
ESD Rating2000 V; condition: human-body model, ANSI/ESDA/JEDEC JS-001
Latch-Up Protection500 mA; condition: AEC-Q100 method 004, TJ = 150 °C
Thermal Resistance Junction-to-Ambient SOIC-8112.2 °C/W; condition: thermal information table
Thermal Resistance Junction-to-Ambient MSOP-PowerPAD-850.7 °C/W; condition: thermal information table
Thermal Resistance Junction-to-Case Top SOIC-854.6 °C/W
Thermal Resistance Junction-to-Case Top MSOP-PowerPAD-856.6 °C/W
Thermal Resistance Junction-to-Board SOIC-853.1 °C/W
Thermal Resistance Junction-to-Board MSOP-PowerPAD-835.9 °C/W
Thermal Resistance Junction-to-Case Bottom MSOP-PowerPAD-84.4 °C/W
Configuration Option LM5111-1Dual noninverting outputs; condition: A output noninverting low in UVLO; B output noninverting low in UVLO
Configuration Option LM5111-2Dual inverting outputs; condition: A output inverting low in UVLO; B output inverting low in UVLO
Configuration Option LM5111-3Inverting and noninverting outputs; condition: A output inverting low in UVLO; B output noninverting low in UVLO
Configuration Option LM5111-4PFET/NFET drive configuration; condition: A output inverting high in UVLO; B output noninverting low in UVLO
Datasheet Statusrequest_only

Product Overview

The LM5111 is a Texas Instruments dual 5-A gate driver in the Power_Management category. It provides two independent driver channels intended to drive two N-channel MOSFETs, with driver outputs specified to swing from VCC to VEE. The recommended VCC-to-VEE supply operating range is 3.5-14 V, with undervoltage lockout rising threshold specified at 2.3 V minimum, 2.9 V typical, and 3.5 V maximum.

Output drive capability is specified as 5 A peak sink current and 3 A peak source current when OUTA or OUTB is at VCC/2 with 200 ns pulsed current. Dynamic behavior includes 25 ns typical low-to-high and high-to-low propagation delays, 14 ns typical rise time, and 12 ns typical fall time with CLOAD = 2 nF.

Package choices are SOIC-8 5.00 mm x 6.00 mm and MSOP-PowerPAD-8 3.00 mm x 4.90 mm. Configuration variants include dual noninverting outputs, dual inverting outputs, mixed inverting and noninverting outputs, and a PFET/NFET drive configuration.

Key Features

  • Two independent gate-driver channels
  • Drives two N-channel MOSFETs
  • 5 A peak sink current
  • 3 A peak source current
  • 3.5-14 V supply operating range
  • Outputs swing from VCC to VEE
  • 25 ns typical propagation delays
  • 14 ns typical rise time with 2 nF load
  • 12 ns typical fall time with 2 nF load
  • UVLO rising threshold 2.9 V typical
  • SOIC-8 and MSOP-PowerPAD-8 packages
  • Four output configuration options

Typical Applications

  • Dual N-channel MOSFET gate drive
  • PFET/NFET drive configuration
  • Inverting gate-drive channels
  • Noninverting gate-drive channels
  • Logic-controlled power switching
  • Fast 2 nF load driving

Procurement Notes

When requesting a quote for LM5111, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For power IC and power device sourcing, voltage rating, current rating, power dissipation, package thermal performance, protection features, qualification grade and application conditions should be reviewed before approval.

FAQ

What type of device is the LM5111?

The LM5111 is a Texas Instruments dual 5-A gate driver in the Power_Management category. It provides two independent driver channels and is specified to drive two N-channel MOSFETs.

What supply range does the LM5111 support?

The recommended VCC-to-VEE operating range is 3.5-14 V. The absolute maximum VCC-to-VEE rating is -0.3 to 15 V, and the UVLO rising threshold is 2.9 V typical.

What are the LM5111 output drive current ratings?

The extracted datasheet facts specify 5 A peak sink current and 3 A peak source current. Both values are under OUTA or OUTB at VCC/2 with 200 ns pulsed current conditions.

Which output configurations are listed for LM5111 variants?

The listed configurations include LM5111-1 dual noninverting outputs, LM5111-2 dual inverting outputs, LM5111-3 inverting and noninverting outputs, and LM5111-4 PFET/NFET drive configuration.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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