Specifications
| Type | Description |
|---|---|
| Part Number | MSP430FR2355 |
| Manufacturer | Texas Instruments |
| Product Type | MCU |
| Category | MCU & Processors |
| Package / Case | LQFP(48) 7 mm x 7 mm; VQFN(40) 6 mm x 6 mm; TSSOP(38) 9.7 mm x 4.4 mm; VQFN(32) 4 mm x 4 mm |
| CPU Architecture | 16-bit RISC; condition: MSP430FR235x/MSP430FR215x family |
| Maximum CPU Frequency | 24 MHz; condition: 16-bit RISC architecture |
| Operating Temperature Range | -40°C to 105°C; condition: all listed package options |
| Supply Voltage Range | 1.8 V to 3.6 V; condition: operational voltage restricted by SVS levels |
| Active Mode Current | 142 µA/MHz; condition: at 3 V |
| LPM3 Current | 1.43 µA; condition: at 3 V, 32768-Hz crystal, SVS enabled |
| LPM3.5 Current | 620 nA; condition: at 3 V, 32768-Hz crystal, SVS enabled |
| Shutdown Current | 42 nA; condition: LPM4.5, SVS disabled |
| Program FRAM | 32 KB; condition: MSP430FR2355 |
| Data FRAM | 512 bytes; condition: MSP430FR2355 |
| RAM | 4 KB; condition: MSP430FR2355 |
| ROM Library Size | 20 KB; condition: includes driver libraries and FFT libraries |
| FRAM Write Endurance | 10^15 write cycles; condition: low-power ferroelectric RAM |
| ADC Resolution | 12-bit; condition: one 12-channel ADC |
| ADC Channels | 12 channels; condition: analog-to-digital converter |
| ADC Sample Rate | 200 ksps; condition: sample-and-hold |
| Internal ADC Reference Voltages | 1.5 V, 2.0 V, 2.5 V; condition: internal shared reference |
| Comparator Count | 2 enhanced comparators; condition: eCOMP modules |
| Comparator DAC Resolution | 6-bit; condition: integrated DAC as reference voltage |
| Comparator Fast Response Time | 100 ns; condition: one comparator in fast response mode |
| Comparator Low-Power Response Time | 1 µs; condition: one comparator at 1.5 µA low power |
| Smart Analog Combo Count | 4 SAC-L3 modules; condition: MSP430FR235x devices only |
| SAC DAC Resolution | 12-bit; condition: Smart analog combo DAC mode |
| PGA Noninverting Gains | x1, x2, x3, x5, x9, x17, x26, x33; condition: configurable PGA noninverting mode |
| PGA Inverting Gains | x1, x2, x4, x8, x16, x25, x32; condition: configurable PGA inverting mode |
| Timer_B3 Count | 3 timers; condition: each with 3 capture/compare registers |
| Timer_B7 Count | 1 timer; condition: with 7 capture/compare registers |
| RTC | 16-bit counter-only real-time clock counter; condition: digital peripheral |
| CRC | 16-bit cyclic redundancy checker; condition: digital peripheral |
| Hardware Multiplier | 32-bit MPY32; condition: digital peripheral |
| UART/SPI Modules | 2 eUSCI_A modules; condition: support UART, IrDA, and SPI |
| SPI/I2C Modules | 2 eUSCI_B modules; condition: support SPI and I2C |
| GPIO Count | 44 I/Os; condition: 48-pin package |
| Interrupt Pins | 32 interrupt pins; condition: P1, P2, P3, and P4 can wake MCU from low-power modes |
| DCO Frequency | 24 MHz; condition: on-chip digitally controlled oscillator with FLL |
| DCO Accuracy | ±1%; condition: with on-chip reference at room temperature |
| REFO Frequency | 32 kHz; condition: on-chip RC oscillator |
| VLO Frequency | 10 kHz; condition: on-chip very-low-frequency oscillator |
| External Low-Frequency Crystal | 32 kHz; condition: LFXT oscillator |
| External High-Frequency Crystal | Up to 24 MHz; condition: HFXT oscillator |
| MCLK Prescaler | 1 to 128; condition: programmable MCLK prescaler |
| SMCLK Prescaler | 1, 2, 4, or 8; condition: SMCLK derived from MCLK |
| Wake-Up Time | Less than 10 µs typical; condition: wake from low-power modes to active mode using DCO |
| Recommended Bypass Capacitor | 4.7 µF to 10 µF; condition: DVCC/DVSS main power pair, ±5% accuracy |
| Recommended Decoupling Capacitor | 0.1 µF; condition: DVCC/DVSS main power pair, ±5% accuracy |
| Datasheet Status | request_only |
Product Overview
The MSP430FR2355 is a Texas Instruments 16-bit FRAM mixed-signal microcontroller built around a 16-bit RISC architecture running up to 24 MHz. It operates from 1.8 V to 3.6 V, supports -40°C to 105°C operation across the listed package options, and integrates 32 KB of program FRAM, 512 bytes of data FRAM, 4 KB RAM, and a 20 KB ROM library with driver and FFT libraries.
Analog resources include a 12-bit, 12-channel ADC rated at 200 ksps, internal 1.5 V, 2.0 V, and 2.5 V references, two enhanced comparators, and four SAC-L3 Smart Analog Combo modules on MSP430FR235x devices. The SAC blocks support 12-bit DAC mode and configurable PGA gain settings.
Digital and timing functions include Timer_B3 and Timer_B7 resources, a 16-bit RTC counter, CRC, 32-bit MPY32 hardware multiplier, eUSCI_A UART/IrDA/SPI modules, and eUSCI_B SPI/I2C modules. Package choices span 48-pin LQFP, 40-pin VQFN, 38-pin TSSOP, and 32-pin VQFN formats, with bypass and decoupling capacitor guidance for DVCC/DVSS assembly.
Key Features
- 16-bit RISC CPU operates up to 24 MHz
- 1.8 V to 3.6 V supply voltage range
- 32 KB program FRAM with 10^15 write cycles
- 12-bit, 12-channel ADC samples at 200 ksps
- Four SAC-L3 modules with 12-bit DAC mode
- Configurable PGA inverting and noninverting gain settings
- Two enhanced comparators with 6-bit DAC references
- Timer_B3, Timer_B7, RTC, CRC, and MPY32 peripherals
- Dual eUSCI_A and dual eUSCI_B serial modules
- Up to 44 I/Os in the 48-pin package
Typical Applications
- Low-power embedded sensing
- Mixed-signal measurement nodes
- Battery-operated control systems
- Analog signal conditioning
- UART, SPI, and I2C interfaces
- Timer-based control functions
- FRAM data logging
- Comparator threshold detection
Procurement Notes
When requesting a quote for MSP430FR2355, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For MCU, processor and logic IC sourcing, package, operating voltage, temperature grade, speed or frequency grade, firmware or mask version, lifecycle status and programming requirements should be checked before approval.
FAQ
What CPU architecture does the MSP430FR2355 use?
The MSP430FR2355 uses a 16-bit RISC CPU architecture and supports a maximum CPU frequency of 24 MHz within the MSP430FR235x/MSP430FR215x family.
What memory is integrated in the MSP430FR2355?
For the MSP430FR2355, the extracted datasheet facts specify 32 KB of program FRAM, 512 bytes of data FRAM, 4 KB of RAM, and a 20 KB ROM library that includes driver libraries and FFT libraries.
What analog functions are included on this microcontroller?
The device includes a 12-bit, 12-channel ADC rated at 200 ksps, internal ADC references of 1.5 V, 2.0 V, and 2.5 V, two enhanced comparators, and four SAC-L3 Smart Analog Combo modules.
Which package options are listed for the MSP430FR2355?
Listed package options are LQFP(48) 7 mm x 7 mm, VQFN(40) 6 mm x 6 mm, TSSOP(38) 9.7 mm x 4.4 mm, and VQFN(32) 4 mm x 4 mm.
What serial communication interfaces does the MSP430FR2355 support?
The MSP430FR2355 provides dual eUSCI_A modules supporting UART, IrDA, and SPI, plus dual eUSCI_B modules supporting SPI and I2C, enabling flexible serial connectivity.
What is the sourcing type for the MSP430FR2355 on LDeepAI?
The MSP430FR2355 is available under sourcing support. Submit an RFQ through the product page for pricing and lead time information from verified supply channels.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.