Specifications
| Type | Description |
|---|---|
| Part Number | MSP430FR5739 |
| Manufacturer | Texas Instruments |
| Product Type | 16-bit FRAM Microcontroller |
| Category | MCU & Processors |
| Component Type | MCU |
| Package / Case | VQFN(40) 6 mm x 6 mm; TSSOP(38) 12.5 mm x 6.2 mm |
| CPU Architecture | 16-bit RISC |
| Maximum Clock Frequency | 24 MHz |
| Supply Voltage Range | 2 V to 3.6 V |
| Operating Temperature Range | -40°C to 85°C |
| Active Mode Current | 81.4 µA/MHz typical |
| Standby Current | 6.3 µA typical |
| RTC Low-Power Current | 1.5 µA typical |
| Shutdown Current | 0.32 µA typical |
| Nonvolatile Memory Type | FRAM |
| FRAM Size | 16 KB |
| SRAM Size | 1 KB |
| FRAM Write Speed | 125 ns per word; 16 KB in 1 ms |
| FRAM Write Endurance | 10^15 write cycles |
| FRAM Protection Features | Built-in ECC and memory protection unit |
| ADC Resolution | 10-bit |
| ADC Channels | 12 external channels, 2 internal channels |
| ADC Sample Rate | 200 ksps |
| Comparator Channels | 16 channels |
| Timer_A | 2 instances, 3 capture/compare registers each |
| Timer_B | 3 instances, 3 capture/compare registers each |
| UART / IrDA / SPI Channels | 2 |
| SPI / I2C Channels | 1 |
| DMA | 3-channel internal DMA |
| Hardware Multiplier | 32-bit |
| I/O Count | 32 I/O in RHA package; 30 I/O in DA package |
| Bootloader | Hardware UART bootloader |
| Power Management | Fully integrated LDO, supply voltage supervisor, always-on zero-power brownout detection |
| Clock Sources | Factory-trimmed DCO, VLO, LFXT, HFXT |
| Datasheet Status | request_only |
Product Overview
The MSP430FR5739 is a Texas Instruments 16-bit FRAM microcontroller built around a 16-bit RISC CPU architecture with a maximum clock frequency of 24 MHz. It operates from a 2 V to 3.6 V supply range and is specified for -40°C to 85°C device operation, supporting embedded control designs that require low-voltage operation and integrated nonvolatile memory.
Its memory subsystem includes 16 KB of FRAM and 1 KB of SRAM. The embedded FRAM supports 125 ns per word write speed, a full 16 KB write in 1 ms, and 10^15 write cycles, with built-in ECC and a memory protection unit. Low-power modes include 81.4 µA/MHz typical active current, 6.3 µA typical standby current in LPM3 with VLO, 1.5 µA typical RTC current in LPM3.5 with a crystal, and 0.32 µA typical shutdown current in LPM4.5.
Peripheral integration includes a 10-bit ADC10_B at 200 ksps, 16 comparator channels, Timer_A and Timer_B resources, eUSCI_A and eUSCI_B serial channels, a 3-channel internal DMA, and a 32-bit hardware multiplier. Package options include VQFN(40) and TSSOP(38), with 32 I/O in the RHA package and 30 I/O in the DA package.
Key Features
- 16-bit RISC CPU runs up to 24 MHz
- 2 V to 3.6 V recommended supply operation
- 16 KB FRAM with 1 KB SRAM
- FRAM writes 125 ns per word, 16 KB in 1 ms
- FRAM endurance rated at 10^15 write cycles
- Built-in FRAM ECC and memory protection unit
- 10-bit ADC with 12 external and 2 internal channels
- 200 ksps ADC operation at 100 µA consumption
- Two eUSCI_A channels for UART, IrDA, or SPI
- One eUSCI_B channel for SPI or I2C
- 3-channel internal DMA and 32-bit hardware multiplier
- Hardware UART bootloader with integrated power management
Typical Applications
- Low-power embedded control
- FRAM-based data logging
- Battery-powered sensor nodes
- RTC-enabled low-power systems
- Mixed-signal monitoring designs
- UART, SPI, or I2C connected controllers
- Timer-based control applications
Procurement Notes
When requesting a quote for MSP430FR5739, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.
If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.
For MCU, processor and logic IC sourcing, package, operating voltage, temperature grade, speed or frequency grade, firmware or mask version, lifecycle status and programming requirements should be checked before approval.
FAQ
What CPU architecture does the MSP430FR5739 use?
The MSP430FR5739 uses a 16-bit RISC CPU architecture. The extracted datasheet facts list a maximum clock frequency of 24 MHz for this 16-bit RISC architecture.
How much memory is integrated in the MSP430FR5739?
For the MSP430FR5739, the extracted facts specify 16 KB of embedded FRAM and 1 KB of SRAM. The FRAM subsystem includes built-in ECC and a memory protection unit.
What package and I/O options are listed for MSP430FR5739?
The listed package options are VQFN(40) 6 mm x 6 mm and TSSOP(38) 12.5 mm x 6.2 mm. The device provides 32 I/O in the RHA package and 30 I/O in the DA package.
Technical Review & Sourcing Note
Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.
This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.