SN74AVC20T245_Bus 20-bit Dual-Supply Bus Transceiver

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SN74AVC20T245_Bus 20-bit Dual-Supply Bus Transceiver

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Part Number
SN74AVC20T245_Bus
Manufacturer
Texas Instruments
Package
DGG 56-pin TSSOP; DGV 56-pin TVSOP; GQL/ZQL VFBGA
Category
Signal Chain
Product Type
I2C Switch

Quick Sourcing Note

SN74AVC20T245_Bus from Texas Instruments is an Interface 20-bit dual-supply bus transceiver supplied in DGG 56-pin TSSOP, DGV 56-pin TVSOP, and GQL/ZQL VFBGA package options. The device is a 20-bit noninverting bus transceiver with configurable voltage translation and 3-state outputs, organized as two independent 10-bit sections. A-port and B-port supplies operate from 1.2 to 3.6 V, with optimized operation from 1.4 to 3.6 V. It supports DIR-controlled transfer direction, OE-controlled bus isolation, power-off high-impedance behavior, Ioff partial-power-down protection, 4.6 V tolerant I/O, and data rates up to 380 Mbps for 1.8 V to 3.3 V translation.

Specifications

TypeDescription
Part NumberSN74AVC20T245_Bus
ManufacturerTexas Instruments
Product TypeI2C Switch
CategorySignal Chain
Component TypeOther
Package / CaseDGG 56-pin TSSOP; DGV 56-pin TVSOP; GQL/ZQL VFBGA
Function20-bit noninverting bus transceiver with configurable voltage translation and 3-state outputs; general device description
Data Direction ControlDIR controls transfer direction; DIR=L: B data to A bus; DIR=H: A data to B bus when OE=L
Output Enable FunctionOE disables outputs for bus isolation; OE=H, DIR=X: isolation
Number of Sections2 independent 10-bit sections; function table specified for each 10-bit section
A-Port Supply Range1.2 to 3.6 V; VCCA recommended operating condition
B-Port Supply Range1.2 to 3.6 V; VCCB recommended operating condition
Optimized Operating Supply Range1.4 to 3.6 V; VCCA/VCCB optimized operation
Minimum Operational Supply1.2 V; VCCA/VCCB operational as low as 1.2 V
Control-Input Reference SupplyVCCA; 1DIR, 2DIR, 1OE, and 2OE supplied/referenced by VCCA
Power-Off IsolationBoth ports high impedance if either VCC input is at GND; VCC isolation feature
Partial-Power-Down SupportIoff circuitry disables outputs to prevent damaging backflow; powered-down operation
I/O Overvoltage Tolerance4.6 V tolerant; inputs/outputs and I/Os feature list
Maximum Data Rate380 Mbps; 1.8-V to 3.3-V translation
Maximum Data Rate260 Mbps; <1.8-V to 3.3-V translation
Maximum Data Rate260 Mbps; translation to 2.5 V
Maximum Data Rate210 Mbps; translation to 1.8 V
Maximum Data Rate120 Mbps; translation to 1.5 V
Maximum Data Rate100 Mbps; translation to 1.2 V
Supply Voltage Absolute Maximum-0.5 to 4.6 V; VCCA and VCCB over operating free-air temperature range
Input Voltage Absolute Maximum-0.5 to 4.6 V; A-port I/O, B-port I/O, and control inputs
High-Impedance or Power-Off Output Voltage Absolute Maximum-0.5 to 4.6 V; A port or B port output in high-impedance or power-off state
Active A-Port Output Voltage Absolute Maximum-0.5 to VCCA + 0.5 V; A-port output in high or low state
Active B-Port Output Voltage Absolute Maximum-0.5 to VCCB + 0.5 V; B-port output in high or low state
Input Clamp Current-50 mA; VI < 0
Output Clamp Current-50 mA; VO < 0
Continuous Output Current±50 mA; any output
Continuous Supply/Ground Current±100 mA; through each VCCA, VCCB, and GND
Package Thermal Impedance64 °C/W; DGG package, JESD 51-7
Package Thermal Impedance48 °C/W; DGV package, JESD 51-7
Package Thermal Impedance42 °C/W; GQL/ZQL package, JESD 51-7
Storage Temperature Range-65 to 150 °C; absolute maximum rating
High-Level Input Voltage0.65 × VCCI min; data inputs, VCCI=1.2 to 1.95 V
High-Level Input Voltage1.6 V min; data inputs, VCCI=1.95 to 2.7 V
High-Level Input Voltage2.0 V min; data inputs, VCCI=2.7 to 3.6 V
Low-Level Input Voltage0.35 × VCCI max; data inputs, VCCI=1.2 to 1.95 V
Low-Level Input Voltage0.7 V max; data inputs, VCCI=1.95 to 2.7 V
Low-Level Input Voltage0.8 V max; data inputs, VCCI=2.7 to 3.6 V
High-Level DIR Input Voltage0.65 × VCCA min; DIR referenced to VCCA, VCCA=1.2 to 1.95 V
High-Level DIR Input Voltage1.6 V min; DIR referenced to VCCA, VCCA=1.95 to 2.7 V
High-Level DIR Input Voltage2.0 V min; DIR referenced to VCCA, VCCA=2.7 to 3.6 V
Low-Level DIR Input Voltage0.35 × VCCA max; DIR referenced to VCCA, VCCA=1.2 to 1.95 V
Low-Level DIR Input Voltage0.7 V max; DIR referenced to VCCA, VCCA=1.95 to 2.7 V
Low-Level DIR Input Voltage0.8 V max; DIR referenced to VCCA, VCCA=2.7 to 3.6 V
Input Voltage Recommended Range0 to 3.6 V; VI recommended operating condition
Output Voltage Recommended Range0 to VCCO; active state
Output Voltage Recommended Range0 to 3.6 V; 3-state condition
High-Level Output Current-3 mA; VCCO=1.2 V
High-Level Output Current-6 mA; VCCO=1.4 to 1.6 V
High-Level Output Current-8 mA; VCCO=1.65 to 1.95 V
High-Level Output Current-9 mA; VCCO=2.3 to 2.7 V
High-Level Output Current-12 mA; VCCO=3.0 to 3.6 V
Low-Level Output Current3 mA; VCCO=1.2 V
Low-Level Output Current6 mA; VCCO=1.4 to 1.6 V
Low-Level Output Current8 mA; VCCO=1.65 to 1.95 V
Low-Level Output Current9 mA; VCCO=2.3 to 2.7 V
Low-Level Output Current12 mA; VCCO=3.0 to 3.6 V
Input Transition Rise/Fall Rate5 ns/V max; recommended operating condition
Operating Free-Air Temperature-40 to 85 °C; recommended operating condition
High-Level Output VoltageVCCO - 0.2 V min; IOH=-100 µA, VCCA=1.2 to 3.6 V, VCCB=1.2 to 3.6 V
High-Level Output Voltage0.95 V min; IOH=-3 mA, VCCA=1.2 V, VCCB=1.2 V
High-Level Output Voltage1.05 V min; IOH=-6 mA, VCCA=1.4 V, VCCB=1.4 V
High-Level Output Voltage1.2 V min; IOH=-8 mA, VCCA=1.65 V, VCCB=1.65 V
High-Level Output Voltage1.75 V min; IOH=-9 mA, VCCA=2.3 V, VCCB=2.3 V
High-Level Output Voltage2.3 V min; IOH=-12 mA, VCCA=3 V, VCCB=3 V
Low-Level Output Voltage0.2 V max; IOL=100 µA, VCCA=1.2 to 3.6 V, VCCB=1.2 to 3.6 V
Low-Level Output Voltage0.15 V max; IOL=3 mA, VCCA=1.2 V, VCCB=1.2 V
Low-Level Output Voltage0.35 V max; IOL=6 mA, VCCA=1.4 V, VCCB=1.4 V
Low-Level Output Voltage0.45 V max; IOL=8 mA, VCCA=1.65 V, VCCB=1.65 V
Low-Level Output Voltage0.55 V max; IOL=9 mA, VCCA=2.3 V, VCCB=2.3 V
Low-Level Output Voltage0.7 V max; IOL=12 mA, VCCA=3 V, VCCB=3 V
Control Input Leakage Current±0.025 µA typ, ±0.25 µA max at 25°C, ±1 µA max over -40 to 85°C; VI=VCCA or GND, VCCA=1.2 to 3.6 V, VCCB=1.2 to 3.6 V
Power-Off Leakage Current±0.1 µA typ, ±1 µA max at 25°C, ±5 µA max over -40 to 85°C; A or B port, VI or VO=0 to 3.6 V, VCCA=0 V, VCCB=0 to 3.6 V
Power-Off Leakage Current±0.1 µA typ, ±1 µA max at 25°C, ±5 µA max over -40 to 85°C; A or B port, VI or VO=0 to 3.6 V, VCCA=0 to 3.6 V, VCCB=0 V
Latch-Up Performance>100 mA; per JESD 78, Class II
ESD Human-Body Model8000 V; JESD 22 A114-A
ESD Machine Model200 V; JESD 22 A115-A
ESD Charged-Device Model1000 V; JESD 22 C101
Datasheet Statusrequest_only

Product Overview

The SN74AVC20T245_Bus is a Texas Instruments 20-bit dual-supply bus transceiver for Interface designs requiring noninverting bidirectional transfer, voltage translation, and 3-state output control. It is divided into two independent 10-bit sections, each controlled by DIR and OE logic. When OE is low, DIR selects B-to-A transfer with DIR low or A-to-B transfer with DIR high; when OE is high, outputs are disabled for bus isolation.

Both A-port and B-port supplies support recommended operation from 1.2 to 3.6 V, with optimized operation from 1.4 to 3.6 V. Control inputs 1DIR, 2DIR, 1OE, and 2OE are supplied and referenced by VCCA. The device includes high-impedance behavior when either VCC input is at GND, plus Ioff circuitry for partial-power-down conditions.

Package options include DGG 56-pin TSSOP, DGV 56-pin TVSOP, and GQL/ZQL VFBGA. Documented use cases include voltage-translated parallel bus connections, isolated bidirectional bus interfaces, and mixed-voltage systems operating across 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V domains.

Key Features

  • 20-bit noninverting bus transceiver with 3-state outputs
  • Two independent 10-bit sections for bus control
  • DIR selects B-to-A or A-to-B transfer direction
  • OE disables outputs for bus isolation
  • A and B ports operate from 1.2 to 3.6 V
  • Optimized operation specified from 1.4 to 3.6 V
  • Control inputs are supplied and referenced by VCCA
  • Ports remain high impedance if either VCC is grounded
  • Ioff circuitry supports partial-power-down operation
  • I/O pins are 4.6 V tolerant
  • Maximum 380 Mbps for 1.8 V to 3.3 V translation
  • -40 to 85 °C recommended free-air operating range

Typical Applications

  • Mixed-voltage parallel bus interfaces
  • Bidirectional voltage translation buses
  • 1.2 V to 3.3 V logic translation
  • Bus isolation with 3-state outputs
  • Two-section 10-bit data path designs
  • Partial-power-down interface connections
  • High-density VFBGA interface assemblies

Procurement Notes

When requesting a quote for SN74AVC20T245_Bus, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.

FAQ

What function does SN74AVC20T245_Bus provide?

SN74AVC20T245_Bus is a 20-bit noninverting bus transceiver with configurable voltage translation and 3-state outputs. It uses two independent 10-bit sections and supports bidirectional transfer controlled by DIR and OE inputs.

What supply ranges are supported on the A and B ports?

The recommended operating range for both VCCA and VCCB is 1.2 to 3.6 V. The datasheet specifies optimized operation from 1.4 to 3.6 V and operation as low as 1.2 V.

How is bus isolation controlled on this device?

OE disables the outputs for bus isolation. The function table specifies isolation when OE is high, regardless of DIR. When OE is low, DIR selects either B-to-A or A-to-B data transfer.

What happens if either supply is at ground?

The VCC isolation feature places both ports in a high-impedance state if either VCC input is at GND. Ioff circuitry also disables outputs during powered-down operation to help prevent damaging backflow.

What package options are listed for SN74AVC20T245_Bus?

The listed package options are DGG 56-pin TSSOP, DGV 56-pin TVSOP, and GQL/ZQL VFBGA. Package thermal impedance values are 64 °C/W for DGG, 48 °C/W for DGV, and 42 °C/W for GQL/ZQL.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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