SN74LS00 Quad 2-input NAND Gate

Texas Instruments Logic — specifications, applications, sourcing support and RFQ.

SN74LS00 Quad 2-input NAND Gate

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Part Number
SN74LS00
Manufacturer
Texas Instruments
Package
SSOP-14 DB 6.20 mm x 5.30 mm; SOIC-14 D 8.65 mm x 3.91 mm; PDIP-14 N 19.30 mm x 6.35 mm; SO-14 NS 10.30 mm x 5.30 mm
Category
Logic
Product Type
Quad 2-input NAND Gate

Quick Sourcing Note

SN74LS00 from Texas Instruments is a Logic quad 2-input NAND gate. The device provides 4 independent gates with TTL-compliant inputs and accepts 3.3 V or 2.5 V logic inputs. Recommended VCC is 4.75 V minimum, 5 V nominal, and 5.25 V maximum, with 0 to 70 °C operating free-air temperature. Package options include SSOP-14 DB, SOIC-14 D, PDIP-14 N, SO-14 NS, and SO-8 PS. Key parameters include 2 V minimum VIH, 0.8 V maximum VIL, 8 mA low-level output current, and 15 ns maximum propagation delay. HBM ESD rating is ±500 V and CDM rating is ±2000 V.

Specifications

TypeDescription
Part NumberSN74LS00
ManufacturerTexas Instruments
Product TypeQuad 2-input NAND Gate
CategoryLogic
Package / CaseSSOP-14 DB 6.20 mm x 5.30 mm; SOIC-14 D 8.65 mm x 3.91 mm; PDIP-14 N 19.30 mm x 6.35 mm; SO-14 NS 10.30 mm x 5.30 mm
Logic FunctionY = A·B inverted; equivalent Y = A + B in positive logic
Number of Gates4 independent gates
Inputs Per Gate2
Input Logic CompatibilityTTL (VIH = 2 V min, VIL = 0.8 V max), accepts 3.3 V or 2.5 V logic
Supply Voltage Range4.75 V min, 5 V nom, 5.25 V max
Supply Voltage Absolute Maximum7 V
Input Voltage Absolute Maximum7 V
High-Level Output Current-0.4 mA max
Low-Level Output Current8 mA max
High-Level Output Voltage2.5 V min, 3.4 V typ
Low-Level Output Voltage0.25 V typ, 0.4 V max (IOL = 4 mA); 0.35 V typ, 0.5 V max (IOL = 8 mA)
Propagation Delay (tPLH)9 ns typ, 15 ns max
Propagation Delay (tPHL)10 ns typ, 15 ns max
Operating Temperature0 to 70 °C
Storage Temperature-65 to 150 °C
Junction Temperature150 °C max
ESD Rating HBM±500 V
ESD Rating CDM±2000 V
Supply Current (Outputs High)0.8 mA typ, 1.6 mA max
Supply Current (Outputs Low)2.4 mA typ, 4.4 mA max
Short-Circuit Output Current-20 mA typ, -100 mA max
Thermal Resistance (θJA) SOIC-14 D90.9 °C/W
Thermal Resistance (θJA) SSOP-14 DB102.8 °C/W
Thermal Resistance (θJA) PDIP-14 N54.8 °C/W
Thermal Resistance (θJA) SO-14 NS89.7 °C/W
Datasheet Statusrequest_only

Product Overview

SN74LS00 is a Texas Instruments quad 2-input NAND gate in the Logic category. Each gate implements Y = A·B inverted, with the positive-logic equivalent Y = A + B. The device provides 4 independent NAND gates, each with 2 inputs.

The SN74LS00 operates from a recommended 4.75 V to 5.25 V supply, with 5 V nominal. Input thresholds are TTL-compatible, with VIH at 2 V minimum and VIL at 0.8 V maximum. Input pins accept 3.3 V or 2.5 V logic inputs.

Package options include SSOP-14 DB (6.20 mm x 5.30 mm), SOIC-14 D (8.65 mm x 3.91 mm), PDIP-14 N (19.30 mm x 6.35 mm), SO-14 NS (10.30 mm x 5.30 mm), and SO-8 PS (6.20 mm x 5.30 mm). For 14-pin packages, VCC is pin 14 and GND is pin 7.

Key Features

  • Quad 2-input NAND gate with 4 independent gates
  • TTL-compliant inputs with 2 V VIH minimum
  • Accepts 3.3 V or 2.5 V logic inputs
  • Recommended VCC range of 4.75 V to 5.25 V
  • 0 to 70 °C operating temperature range
  • 15 ns maximum propagation delay
  • HBM ESD rating of ±500 V
  • CDM ESD rating of ±2000 V
  • 14-pin package options (SSOP, SOIC, PDIP, SO)
  • Pin 14 VCC and pin 7 GND on 14-pin packages

Typical Applications

  • Two-input NAND logic functions
  • TTL-compatible logic interfaces
  • 5 V digital logic systems
  • 3.3 V input logic interfacing
  • 2.5 V input logic interfacing
  • Four-gate logic circuit implementations
  • 14-pin package board designs

Procurement Notes

When requesting a quote for SN74LS00, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For MCU, processor and logic IC sourcing, package, operating voltage, temperature grade, speed or frequency grade, firmware or mask version, lifecycle status and programming requirements should be checked before approval.

FAQ

What logic function does the SN74LS00 implement?

Each SN74LS00 gate implements a 2-input NAND function, with Y equal to A·B inverted. The positive-logic equivalent is Y = A + B for each 2-input NAND gate.

How many gates are included in the SN74LS00?

The SN74LS00 is a quad 2-input NAND gate, providing 4 independent NAND gates, each with 2 inputs, in a single 14-pin package.

What supply voltage is recommended for SN74LS00 operation?

For SN74xx00 devices including SN74LS00, the recommended VCC is 4.75 V minimum, 5 V nominal, and 5.25 V maximum. The absolute maximum supply voltage is 7 V.

Which pins provide power on 14-pin SN74LS00 packages?

For CDIP, CFP, SOIC, PDIP, SO, and SSOP 14-pin packages, VCC is pin 14 and GND is pin 7.

What is the propagation delay of the SN74LS00?

The propagation delay is 15 ns maximum for both low-to-high (tPLH) and high-to-low (tPHL) transitions under test conditions (VCC = 5 V, TA = 25 °C, RL = 2 kΩ, CL = 15 pF).

What ESD protection does the SN74LS00 have?

The SN74LS00 has an HBM ESD rating of ±500 V per ANSI/ESDA/JEDEC JS-001 and a CDM ESD rating of ±2000 V per JEDEC JESD22-C101.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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