SN74AVC4T245 Dual-Bit Bus Transceiver Translator

Texas Instruments Interface - specifications, applications, sourcing support and RFQ.

SN74AVC4T245 Dual-Bit Bus Transceiver Translator

RFQ Available Sourcing Support Alternative Matching RoHS
Part Number
SN74AVC4T245_Bus
Manufacturer
Texas Instruments
Package
D SOIC-16 9.9 mm x 6 mm; DGV TVSOP-16 3.6 mm x 6.4 mm; PW TSSOP-16 5 mm x 6.4 mm; RGY WQFN-16 4 mm x 3.5 mm; RSV UQFN-16 2.6 mm x 1.8 mm; BQB WQFN-16 3.5 mm x 2.5 mm; DYY SOT-16 4.2 mm x 2 mm
Category
Logic
Product Type
Level Shifter

Quick Sourcing Note

SN74AVC4T245_Bus from Texas Instruments is an Interface dual-bit bus transceiver voltage translator. The datasheet describes the SN74AVC4T245 as a 4-bit noninverting bus transceiver with configurable voltage translation and 3-state outputs. A-port and B-port supplies operate from 1.2 V to 3.6 V, with an optimized 1.4 V to 3.6 V range. Supported package options include SOIC-16, TVSOP-16, TSSOP-16, WQFN-16, UQFN-16, and SOT-16. Key parameters include 4.6 V tolerant I/O pins, data rates up to 380 Mbps for 1.8 V to 3.3 V translation, Ioff partial power-down support, VCC isolation, and -40 °C to 85 °C operation.

Specifications

TypeDescription
Part NumberSN74AVC4T245_Bus
ManufacturerTexas Instruments
Product TypeLevel Shifter
CategoryLogic
Package/CaseD SOIC-16 9.9 mm x 6 mm; DGV TVSOP-16 3.6 mm x 6.4 mm; PW TSSOP-16 5 mm x 6.4 mm; RGY WQFN-16 4 mm x 3.5 mm; RSV UQFN-16 2.6 mm x 1.8 mm; BQB WQFN-16 3.5 mm x 2.5 mm; DYY SOT-16 4.2 mm x 2 mm
Datasheet Part NumberSN74AVC4T245
Function4-bit noninverting bus transceiver with configurable voltage translation and 3-state outputs
A-Port Supply Voltage1.2 V to 3.6 V
B-Port Supply Voltage1.2 V to 3.6 V
Optimized Supply Range1.4 V to 3.6 V
Minimum Operational Supply1.2 V
I/O Tolerance4.6 V tolerant
Maximum Data Rate380 Mbps, 1.8 V to 3.3 V translation
Maximum Data Rate200 Mbps, <1.8 V to 3.3 V translation
Maximum Data Rate200 Mbps, translation to 2.5 V or 1.8 V
Maximum Data Rate150 Mbps, translation to 1.5 V
Maximum Data Rate100 Mbps, translation to 1.2 V
Direction Control ReferenceReferenced to VCCA
Output Enable ReferenceReferenced to VCCA
Partial Power-Down SupportIoff circuitry disables outputs to prevent damaging current backflow
VCC IsolationBoth ports high impedance if either VCC input is at GND
High-Impedance ControlTie OE to VCC through pullup resistor
Latch-Up Performance>100 mA per JESD78 Class II
ESD Rating HBM8 kV, ANSI/ESDA/JEDEC JS-001, all pins
ESD Rating CDM1 kV, JEDEC JESD22-C101, all pins
ESD Rating Machine Model150 V
Absolute Maximum Supply Voltage-0.5 V to 4.6 V, VCCA and VCCB
Absolute Maximum Input Voltage-0.5 V to 4.6 V, A-port I/O, B-port I/O, and control inputs
Absolute Maximum High-Impedance Output Voltage-0.5 V to 4.6 V, any output in high-impedance or power-off state
Absolute Maximum Active Output VoltageA port: -0.5 V to VCCA + 0.5 V; B port: -0.5 V to VCCB + 0.5 V
Input Clamp Current-50 mA, VI < 0 V
Output Clamp Current-50 mA, VO < 0 V
Continuous Output Current+/-50 mA absolute maximum IO
Continuous Supply or Ground Current+/-100 mA through VCCA, VCCB, or GND
Operating Free-Air Temperature-40 °C to 85 °C
Storage Temperature-65 °C to 150 °C
Data Input VIH0.65 x VCCI min; 1.6 V min; 2 V min
Data Input VIL0.35 x VCCI max; 0.7 V max; 0.8 V max
DIR Input VIH0.65 x VCCA min; 1.6 V min; 2 V min
DIR Input VIL0.35 x VCCA max; 0.7 V max; 0.8 V max
Input Voltage0 V to 3.6 V recommended VI
Output VoltageActive: 0 V to VCCO; 3-state: 0 V to 3.6 V
High-Level Output Current-3 mA, -6 mA, -8 mA, -9 mA, -12 mA
Low-Level Output Current3 mA, 6 mA, 8 mA, 9 mA, 12 mA
Input Transition Rise or Fall Rate5 ns/V max
VOHVCCO - 0.2 V min, IOH = -100 uA
VOH0.95 V min; 1.05 V min; 1.2 V min; 1.75 V min; 2.3 V min
VOL0.2 V max, IOL = 100 uA
VOL0.25 V max; 0.35 V max; 0.45 V max; 0.55 V max; 0.7 V max
Control Input Leakage Current+/-0.025 uA typ, +/-0.25 uA max at 25 °C; +/-1 uA max from -40 °C to 85 °C
Power-Off Leakage Current+/-0.1 uA typ, +/-1 uA max at 25 °C; +/-5 uA max from -40 °C to 85 °C
3-State Output Leakage Current+/-0.5 uA typ, +/-2.5 uA max at 25 °C; +/-5 uA max from -40 °C to 85 °C
Supply Current ICCA8 uA max; -2 uA max when VCCA = 0 V and VCCB powered
Supply Current ICCB8 uA max; -2 uA max when VCCB = 0 V and VCCA powered
Total Supply Current16 uA max
Control Input Capacitance3.5 pF typ, 4.5 pF max
A/B Port Capacitance6 pF typ, 7 pF max
Junction-to-Ambient Thermal ResistanceD 85.5 °C/W; BQB 80.8 °C/W; DYY 163.4 °C/W; DGV 126.0 °C/W; PW 102.8 °C/W; RGY 68.8 °C/W; RSV 146.9 °C/W
Junction-to-Case Top Thermal ResistanceD 46.9 °C/W; BQB 77.9 °C/W; DYY 90.0 °C/W; DGV 50.8 °C/W; PW 35.9 °C/W; RGY 70.6 °C/W; RSV 53.6 °C/W
Package OptionsSOIC-16, TVSOP-16, TSSOP-16, WQFN-16, UQFN-16, SOT-16
Datasheet Statusrequest_only

Product Overview

SN74AVC4T245_Bus is based on the Texas Instruments SN74AVC4T245, a 4-bit noninverting bus transceiver with configurable voltage translation and 3-state outputs. The device uses separate A-port and B-port supply rails, each specified from 1.2 V to 3.6 V, with optimized operation from 1.4 V to 3.6 V.

The direction and output-enable control inputs are referenced to VCCA. The I/O pins are 4.6 V tolerant, and the device supports multiple translation data-rate conditions, including 380 Mbps for 1.8 V to 3.3 V translation and lower maximum rates for translation to 1.5 V or 1.2 V.

Package coverage includes SOIC-16, TVSOP-16, TSSOP-16, WQFN-16, UQFN-16, and SOT-16 formats with listed thermal resistance values for 16-pin package variants. Electrical limits include ESD ratings of 8 kV HBM, 1 kV CDM, and 150 V machine model, plus latch-up performance greater than 100 mA per JESD78 Class II. The part supports powered-down operation through Ioff circuitry and places both ports in high impedance if either VCC input is at GND.

Key Features

  • 4-bit noninverting bus transceiver with 3-state outputs
  • Configurable voltage translation between A and B ports
  • A-port and B-port supplies support 1.2 V to 3.6 V
  • Optimized supply operation from 1.4 V to 3.6 V
  • I/O pins specified as 4.6 V tolerant
  • Maximum 380 Mbps for 1.8 V to 3.3 V translation
  • Ioff circuitry supports partial power-down operation
  • VCC isolation places both ports in high impedance
  • DIR and OE control inputs referenced to VCCA
  • 8 kV HBM and 1 kV CDM ESD ratings

Typical Applications

  • Logic-level voltage translation
  • Bidirectional bus interface bridging
  • Mixed-voltage digital systems
  • 3-state bus isolation
  • Power-down protected interfaces
  • Low-voltage processor I/O translation
  • Compact 16-pin interface designs

Procurement Notes

When requesting a quote for SN74AVC4T245_Bus, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For MCU, processor and logic IC sourcing, package, operating voltage, temperature grade, speed or frequency grade, firmware or mask version, lifecycle status and programming requirements should be checked before approval.

FAQ

What function does the SN74AVC4T245_Bus provide?

The datasheet identifies the SN74AVC4T245 as a 4-bit noninverting bus transceiver with configurable voltage translation and 3-state outputs, used as a dual-bit bus transceiver voltage translator in Interface applications.

What supply voltage range is specified for both ports?

Both the A-port supply VCCA and B-port supply VCCB are specified from 1.2 V to 3.6 V. The optimized operating range for VCCA and VCCB is listed as 1.4 V to 3.6 V.

What packages are listed for this Texas Instruments device?

The package options listed in the extracted datasheet facts are SOIC-16, TVSOP-16, TSSOP-16, WQFN-16, UQFN-16, and SOT-16, with package dimensions provided for D, DGV, PW, RGY, RSV, BQB, and DYY variants.

How does the device behave during partial power-down conditions?

The datasheet facts state that Ioff circuitry disables outputs to prevent damaging current backflow during powered-down operation. They also state that both ports become high impedance if either VCC input is at GND.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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