SN74LVC2G126 Dual Bus Buffer Gate

Texas Instruments Signal_Chain — specifications, applications, sourcing support and RFQ.

SN74LVC2G126 Dual Bus Buffer Gate

RFQ Available Sourcing Support Alternative Matching RoHS
Part Number
SN74LVC2G126
Manufacturer
Texas Instruments
Package
SM8/DCT 8-pin 2.95 mm x 2.80 mm; VSSOP/DCU 8-pin 2.30 mm x 2.00 mm; DSBGA/YZP 8-pin 1.91 mm x 0.91 mm
Category
Signal Chain
Product Type
Operational Amplifier

Quick Sourcing Note

SN74LVC2G126 from Texas Instruments is a Signal_Chain dual bus buffer gate implemented as a dual line driver with 3-state outputs. The output is disabled when the output-enable input is low, supporting controlled bus connection and isolation. It operates from 1.65 V to 5.5 V, with 1.5 V data-retention supply support and a -40 to +125 °C operating free-air temperature range. Package options include 8-pin SM8/DCT, VSSOP/DCU, and DSBGA/YZP formats. Key electrical parameters include 0 to 5.5 V input range, 0 to VCC driven output range, 0 to 5.5 V 3-state output tolerance, 10 µA maximum quiescent current, and nanosecond-scale propagation, enable, and disable timing.

Specifications

TypeDescription
Part NumberSN74LVC2G126
ManufacturerTexas Instruments
Product TypeOperational Amplifier
CategorySignal Chain
Package / CaseSM8/DCT 8-pin 2.95 mm x 2.80 mm; VSSOP/DCU 8-pin 2.30 mm x 2.00 mm; DSBGA/YZP 8-pin 1.91 mm x 0.91 mm
FunctionDual line driver with 3-state outputs; output disabled when output-enable input is low
Operating Supply Voltage1.65-5.5 V; recommended operating conditions
Data Retention Supply Voltage1.5 V; data retention only
Absolute Maximum Supply Voltage-0.5 to 6.5 V; over operating free-air temperature range
Input Voltage Range0 to 5.5 V; recommended operating conditions
Absolute Maximum Input Voltage-0.5 to 6.5 V; input clamp-current ratings must be observed if exceeded
High-Level Input Voltage0.65 x VCC min; VCC = 1.65 V to 1.95 V
High-Level Input Voltage1.7 V min; VCC = 2.3 V to 2.7 V
High-Level Input Voltage2.0 V min; VCC = 3.0 V to 3.6 V
High-Level Input Voltage0.7 x VCC min; VCC = 4.5 V to 5.5 V
Low-Level Input Voltage0.35 x VCC max; VCC = 1.65 V to 1.95 V
Low-Level Input Voltage0.7 V max; VCC = 2.3 V to 2.7 V
Low-Level Input Voltage0.8 V max; VCC = 3.0 V to 3.6 V
Low-Level Input Voltage0.3 x VCC max; VCC = 4.5 V to 5.5 V
Output Voltage Range0 to VCC; output in high or low state
Output Voltage Range0 to 5.5 V; output in 3-state mode
High-Level Output Current-4 mA; VCC = 1.65 V
High-Level Output Current-8 mA; VCC = 2.3 V
High-Level Output Current-16 mA to -24 mA; VCC = 3.0 V
High-Level Output Current-32 mA; VCC = 4.5 V
Low-Level Output Current4 mA; VCC = 1.65 V
Low-Level Output Current8 mA; VCC = 2.3 V
Low-Level Output Current16 mA to 24 mA; VCC = 3.0 V
Low-Level Output Current32 mA; VCC = 4.5 V
Maximum Propagation Delay4 ns max; VCC = 3.3 V, -40°C to +85°C, A to Y
Propagation Delay1.4-5.0 ns; VCC = 3.3 V ±0.3 V, -40°C to +125°C, A to Y
Enable Time1.5-4.1 ns; VCC = 3.3 V ±0.3 V, -40°C to +85°C, OE to Y
Disable Time1.0-4.4 ns; VCC = 3.3 V ±0.3 V, -40°C to +85°C, OE to Y
Quiescent Supply Current10 µA max; VI = 5.5 V or GND, IO = 0, VCC = 1.65 V to 5.5 V
Input Leakage Current±5 µA max; A or OE inputs, VI = 5.5 V or GND, VCC = 0 to 5.5 V
Power-Off Leakage Current±10 µA max; VI or VO = 5.5 V, VCC = 0 V
High-Impedance Output Leakage Current10 µA max; VO = 0 to 5.5 V, VCC = 3.6 V
Operating Free-Air Temperature-40 to +125 °C; recommended operating conditions
ESD Rating Human Body Model2000 V; per ANSI/ESDA/JEDEC JS-001
ESD Rating Charged Device Model1000 V; per JEDEC JESD22-C101
Junction-to-Ambient Thermal Resistance220 °C/W; DCT SM8 package, 8 pins
Junction-to-Ambient Thermal Resistance227 °C/W; DCU VSSOP package, 8 pins
Junction-to-Ambient Thermal Resistance102 °C/W; YZP DSBGA package, 8 pins
Datasheet Statusrequest_only

Product Overview

The SN74LVC2G126 is a Texas Instruments dual bus buffer gate for Signal_Chain designs requiring two non-inverting line-driver channels with 3-state outputs. Its outputs are disabled when the corresponding output-enable input is low, allowing a driven signal path to be disconnected from a bus or shared node under logic control.

Recommended operation covers a 1.65 V to 5.5 V supply range, with 1.5 V specified for data retention only. Inputs support a recommended 0 to 5.5 V range, while outputs support 0 to VCC when actively driven and 0 to 5.5 V in 3-state mode. Logic thresholds are specified across 1.65 V to 5.5 V VCC ranges, and output current ratings scale from 4 mA at 1.65 V to 32 mA at 4.5 V.

The device is available in compact 8-pin SM8/DCT, VSSOP/DCU, and DSBGA/YZP packages. Timing data includes 4 ns maximum A-to-Y propagation delay at 3.3 V and -40 °C to +85 °C, with 1.4 ns to 5.0 ns propagation delay over 3.3 V ±0.3 V and -40 °C to +125 °C. These facts support use in voltage-flexible digital signal buffering and bus-isolation functions.

Key Features

  • Dual line driver with 3-state output control
  • Outputs disable when output-enable input is low
  • 1.65 V to 5.5 V recommended supply range
  • 1.5 V supply specified for data retention only
  • Inputs support 0 to 5.5 V recommended range
  • Driven outputs support 0 to VCC voltage range
  • 3-state outputs tolerate 0 to 5.5 V
  • 4 ns maximum propagation delay at 3.3 V
  • 10 µA maximum quiescent supply current
  • -40 to +125 °C operating free-air temperature

Typical Applications

  • Controlled digital bus buffering
  • 3-state signal isolation
  • Dual line driver stages
  • Voltage-flexible logic interfaces
  • Power-off tolerant signal paths
  • Compact digital signal routing

Procurement Notes

When requesting a quote for SN74LVC2G126, buyers should confirm the manufacturer, package or case, required quantity, target date code, compliance documents, packing method, destination country and expected delivery schedule.

If alternatives are acceptable, buyers should share the approved vendor list, required electrical or optical limits, package constraints and qualification requirements. Any alternative part should be reviewed by the buyer's engineering team before production use.

For analog and signal-chain sourcing, supply voltage, bandwidth, accuracy, noise level, package, temperature grade, input/output configuration and qualification requirements should be verified before approval.

FAQ

What function does the SN74LVC2G126 provide?

The SN74LVC2G126 is a dual line driver with 3-state outputs. Its output is disabled when the output-enable input is low, allowing the device to disconnect its driven output from a bus or signal line.

What supply voltage range is recommended for this device?

The recommended operating supply voltage range is 1.65 V to 5.5 V. A 1.5 V supply condition is specified for data retention only, not for normal recommended operation.

Which package options are listed for SN74LVC2G126?

The listed package options are SM8/DCT 8-pin at 2.95 mm x 2.80 mm, VSSOP/DCU 8-pin at 2.30 mm x 2.00 mm, and DSBGA/YZP 8-pin at 1.91 mm x 0.91 mm.

What output voltage ranges are specified?

When the output is in a high or low state, the output voltage range is 0 to VCC. In 3-state mode, the output voltage range is specified as 0 to 5.5 V.

What timing parameters are specified at 3.3 V operation?

At VCC = 3.3 V and -40°C to +85°C, A-to-Y maximum propagation delay is 4 ns. Over 3.3 V ±0.3 V and -40°C to +125°C, A-to-Y propagation delay is 1.4 ns to 5.0 ns.

Technical Review & Sourcing Note

Prepared by LDeepAI Component Sourcing Team. Reviewed for RFQ, documentation and alternative sourcing use. Last updated: June 30, 2026.

This page is based on manufacturer datasheet information and LDeepAI sourcing review. Specifications should be verified against the official manufacturer datasheet before final procurement or design approval. Final electrical, optical and reliability approval should be confirmed by the buyer's engineering team.

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